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L4/L3 memory map unable to access after loading BIOS example in CCS 5.1.

Eric Chen
Intellectual 810 points
Other Parts Discussed in Thread: SYSBIOS

Hello,

    I'm using DM8148 platform and SysBIOS v6.32.3.43. I modify the BIOS example "task mutex". There are two tasks that I modify one to receive data via UART, and the other is for sending data via I2C. The exception would occur when it intializes I2C.

    I found that the address area 0x4XXXXXXX is able to access after I executed GEL file, but it failed to access after I load the .out file. Furthermore, it displayed "0BAD" from address 0x00000000 to 0x7FFFFFFF in memory browser.

    I tried the original task mutex example. Memory of the same area was unable to access after the .out file was loaded.

    When I loaded the simple BIOS Hello example with the same GEL file, the memory could be accessed.

    I need to control some peripherals in multi-task code. Could anyone help me how to solve this problem? Thank in advanced.

 

Regards,

    Eric

  • 0
    TI__Mastermind 45025 points

    Hi Eric,

    Are you using the PSP drivers?

    Which core of the DM8148 are you trying to run your program on?

    Eric Chen said:
        I found that the address area 0x4XXXXXXX is able to access after I executed GEL file, but it failed to access after I load the .out file. Furthermore, it displayed "0BAD" from address 0x00000000 to 0x7FFFFFFF in memory browser.

    Can you attach the *.map file for the above mentioned program?

    Eric Chen said:
    When I loaded the simple BIOS Hello example with the same GEL file, the memory could be accessed.

    Can you attach also the *.map file for the above mentioned working program?

    Thanks,

    Steve

  • 0 in reply to Steven Connell
    Intellectual 810 points

    Hi Steven,

       The code is running on A8.  I'm going to verifying some signal, so I just set the registers directly in my code without using PSP drivers.

        The attached is the .map files of my code and original task mutex example.7266.EagleII.map.txt6114.BIOS_Task.map.txt

  • 0 in reply to Eric Chen
    TI__Mastermind 45025 points

    Hi Eric,

    Thanks for attaching the map files.  But I think you attached the map file for the original task mutex example (which did not work).

    I was hoping you could attach the *.map file of the hello example (the program that *is* working for you).

    Thanks,

    Steve

  • 0 in reply to Steven Connell
    Intellectual 810 points

    0525.SimpleHelloWorld.map.txtHi Steven,

        Sorry I would correct my information.

        There are two hello world example after CCS 5.1 is installed. One is Basic Examples-->Hello World which (called it BasicHello in this post) is not RTSC platform project. The other is SYS/BIOS-->Generic Examples-->Hello Example (called it BIOSHello in this post) which is an RTSC platform project.

    1. When I load the BasicHello, the memory could be accessed.

    2. When I load the BIOSHello, the memory is unable to be accessed.

        It seems that the difference is between RTSC and non-RTSC projects.

        Attached is the .map of BasicHello example.

     

    Regards,

        Eric

  • 0 in reply to Eric Chen
    TI__Mastermind 45025 points

    Eric,

    We think the problem is that the address space of your peripherals is not mapped to the MMU.  You need to add an entry into the MMU table for each of the 1MB pages that your peripherals occupy.

    You would need to do this in your *.cfg file of you BIOS application.  The code will be similar to the following:

    Var Mmu = xdc.useModule(('ti.sysbios.family.arm.a8.Mmu');

    var peripheralAddress = /* 1Mb base address of your peripheral address here */

    /* Force peripheral sections to be NON cacheable */
    var peripheralAttrs =
                {
                    type       : Mmu.FirstLevelDesc_SECTION,  // SECTION descriptor
                    bufferable : false,                       // bufferable
                    cacheable  : false,                       // cacheable
                    shareable  : false,                       // shareable
                };

    /* 1-to-1 mapping of virtual to physical address from the table above */
    Mmu.setFirstLevelDescMeta(peripheralAddress, peripheralAddress, peripheralAttrs);

    Steve

  • 0 in reply to Steven Connell
    Intellectual 810 points

    Sorry for reply late.

      I tried to added the configuration in my .cfg file. It seems not working. And I have some questions:

    1. Does this line "var peripheralAddress = /* 1Mb base address of your peripheral address here */" mean I should assgin the base address of each peripheral address? For example, if I would like to configure UART0 and PRCM peripheral registers, two virtual peripheral address should be assigned respectively?

    2. Then, 1-to-1 mapping of virtual to physical address "Mmu.setFirstLevelDescMeta(peripheralAddress, peripheralAddress, peripheralAttrs);" should be set respectively, too?

     

    Regards,

        Eric