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AM6442: EMMC Boot Meet Resetting Problem

Part Number: AM6442
Other Parts Discussed in Thread: CSD,

Tool/software:

Hi TI Experts,

Customer just build their board based on AM64x. Their board does not have SD card, only have eMMC. They are using SDK10.0.

Today they are bringing up their board, and they could use USB-DFU to boot successfully.

However, when they try on the eMMC boot, they will meet the below problem.

It seems that there is resetting problem, and customer's board will stuck here.

We have found a very similar case below.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1336852/am6442-warm-rst-in-spl-does-not-work-with-emmc-on-custom-board

However, after we tried the FAQ mentioned in the above / below link, the problem still exists.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1168342/faq-am62x-how-to-check-and-configure-emmc-flash-rst_n-signal-to-support-warm_reset-from-emmc-booting-on-am62x-sk-e2

We have tried the below method, but it is not useful.

To provide more information for your reference, customer is using 4MB eMMC, our EVM is using 8MB. Customer has followed the below FAQ to modify the code for 4MB eMMC.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1163840/faq-am62x-how-to-customize-emmc-and-ospi-flash-layout-for-spl-u-boot-booting-with-ti-am62x-linux-sdk

We also doubt that this may also due to the HW design issues, so we also provided the HW schematic for eMMC here for your review.

This is very urgent for customer to bring up the board, and this is a very important project for using AM64x to control multi-axis servo.

Could you please provide some suggestions for customer to try?

Many Thanks,

Kevin

  • Hello wangbin215

    Thank you.

    R513 connects the warm reset output status output RESETSTATz to the eMMC reset.

    I would expect this pin to be connected to the eMMC reset input to perform cold or warm reset.

    Regards,

    Sreenivasa

  • Removing R513 was just a test. Unlikely it would be the case, but wanted to know if eMMC reset in the working case has anything to do with RESETSTATz signal.

    Wangbin,

    Can you please apply the U-Boot patch below to see if fixes the warmreset stuck issue? It moves the warmreset assertion from tiboot3 to tispl, which is still earlier than U-Boot.

    diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
    index 80c3cb3479f7..1cf52d2f272a 100644
    --- a/arch/arm/mach-k3/am642_init.c
    +++ b/arch/arm/mach-k3/am642_init.c
    @@ -167,10 +167,10 @@ static void enable_mcu_esm_reset(void)
     void board_init_f(ulong dummy)
     {
     #if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) || defined(CONFIG_ESM_K3)
    +#endif
            struct udevice *dev;
            int ret;
            int rst_src;
    -#endif
     
     #if defined(CONFIG_CPU_V7R)
            setup_k3_mpu_regions();
    @@ -212,7 +212,7 @@ void board_init_f(ulong dummy)
                            k3_mmc_restart_clock);
     #endif
     
    -#if defined(CONFIG_CPU_V7R)
    +#if !defined(CONFIG_CPU_V7R)
            /*
             * Errata ID i2331 CPSW: A device lockup can occur during the second
             * read of any CPSW subsystem register after any MAIN domain power on

  • Hi Bin,

             Finaly, I understand the root cause.

    Yesterday, I changed another emmc chip from samsung. There was no warm reset stuck in tiboot3 after replacing the emmc chip.

    The measured warm reset sequence timing are same for stucked and successful boot.

    So the problem is the emmc chip.

    The reason is that the original  emmc cannot properly reset in the boot mode but can reset in the normal operation mode.

    Then, I add code to the tiboot3 and mannually send CMD0+args0 to put the emmc into idle state before errata work around warm reset.

    It works!

    I think this topic can be closed. 

    Many thanks to Bin & Kevin!

  • Hi Wangbin,

    Glad the issue is resolved. Thanks for the update.

    Do you mind to share the U-Boot patch? We might want to add it to the U-Boot code to make the errata work around more reliable.

  • Hi All, 

    I am adding the schematics review observations that may be needed to be taken care.

    Summary

    The RESETSTATz is referenced to VDDSHV0 and connected to 3.3V

    eMMC IO is 1.8V

    There is a mismatch in IO level and causing voltage feed.

    Since the power solution is discrete residual voltage is not being detected.

    Customer needs to add a resistor divider (1K total value) for the eMMC  reset input. Use a buffer later.

     

     

    DNI C502

    0.1uF

    Connecting large cap across the SOC output is not recommended

    Slow ramp affects eMMC reset behavior

     

    DNI R515 10K pullup

    Clock needs a pulldown

    SOC drives the clock during reset and hence no pull is required

     

    DNI R514

     

    Reduce R512 series resistor value to 0R

    Regards,

    Sreenivasa

  • for your reference,

    diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
    index 80c3cb34..d363cfad 100644
    --- a/arch/arm/mach-k3/am642_init.c
    +++ b/arch/arm/mach-k3/am642_init.c
    @@ -93,6 +93,44 @@ void k3_mmc_restart_clock(void)
                    mmc_set_clock(mmc, mmc->saved_clock, false);
            }
     }
    +
    +void k3_mmc_reset(void)
    +{
    +       if (spl_boot_device() == BOOT_DEVICE_MMC1) {
    +               struct mmc *mmc;
    +               struct mmc_cmd cmd;
    +               struct udevice *dev;
    +               int err;
    +               int ret;
    +
    +               printf("k3_mmc_reset\n");
    +
    +               ret = mmc_init_device(0);
    +               if (!ret) {
    +                       mmc = find_mmc_device(0);
    +                       if (mmc) {
    +                               ret = mmc_init(mmc);
    +                               if (ret) {
    +                                       printf("mmc init failed with error: %d\n", ret);
    +                               }
    +                       }
    +               }
    +
    +               //printf("mmc reset\n");
    +               cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
    +               cmd.cmdarg = 0;
    +               cmd.resp_type = MMC_RSP_NONE;
    +
    +               err = mmc_send_cmd(mmc, &cmd, NULL);
    +
    +               if (err)
    +                       return;
    +
    +               udelay(200);
    +               k3_mmc_stop_clock();
    +
    +       }
    +}
     #else
     void k3_mmc_stop_clock(void) {}
     void k3_mmc_restart_clock(void) {}
    @@ -163,13 +201,14 @@ static void enable_mcu_esm_reset(void)
            writel(stat, CTRLMMR_MCU_RST_CTRL);
     }
     #endif
    -
    
    
     #if defined(CONFIG_CPU_V7R)
    @@ -231,15 +270,26 @@ void board_init_f(ulong dummy)
                    printf("\n%s:uclass device error [%d]\n",__func__,ret);
    
            rst_src = readl(CTRLMMR_MCU_RST_SRC);
    +       printf("rst_src: 0x%x\n", rst_src);
    +
            if (rst_src == COLD_BOOT || rst_src & (SW_POR_MCU | SW_POR_MAIN)) {
                    printf("Resetting on cold boot to workaround ErrataID:i2331\n");
                    printf("Please resend tiboot3.bin in case of UART/DFU boot\n");
    +               k3_mmc_reset(); //fix emmc chip cannot reset in boot mode
                    do_reset(NULL, 0, 0, NULL);
    +
            }
    +
     #endif
    

  • Hi Kallikuppa,

    Thanks. We'll fix the hardware problem.

  • Hi Wangbin,

    Thank you.

    Regards,

    Sreenivasa