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TDA4VM: vxMapImagePatch fail

yichi zhang
Prodigy 120 points
Part Number: TDA4VM

Tool/software:

Hi,

We want to optimize DDR memory layout for TDA4.

After reducing size of SHMEM,  the Shared memory for Buffers/ION allocator, there is a vxMapImagePatch fail said that shared mem ptr allocation failed.

We want to know that for VX_ZONE how to calculate the appropriate shared memory size for a camera of resolution 1280x1285.

2772.system_memory_map.html 
<!DOCTYPE html>
<html>
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.tg td{font-family:Arial, sans-serif;font-size:14px;padding:10px 5px;border-style:solid;border-width:1px;overflow:hidden;word-break:normal;border-color:#999;color:#444;background-color:#F7FDFA;}
.tg th{font-family:Arial, sans-serif;font-size:14px;font-weight:normal;padding:10px 5px;border-style:solid;border-width:1px;overflow:hidden;word-break:normal;border-color:#999;color:#fff;background-color:#26ADE4;}
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.tg .tg-fjir{background-color:#343434;color:#ffffff;text-align:left;vertical-align:top}
</style>

    <head>
        <title>System Memory Map for Linux+RTOS mode</title>
    </head>
    <body>
        <h1>System Memory Map for Linux+RTOS mode</h1>
        <p>Note, this file is auto generated using PyTI_PSDK_RTOS tool</p>
        <table class="tg">
            <tr>
                <th class="tg-fjir">Name</th>
                <th class="tg-fjir">Start Addr</th>
                <th class="tg-fjir">End Addr</th>
                <th class="tg-fjir">Size </th>
                <th class="tg-fjir">Attributes</th>
                <th class="tg-fjir">Description</th>
            </tr>
            <tr>
                <td class="tg-kftd">L2RAM_C66x_1</td>
                <td class="tg-kftd">0x00800000</td>
                <td class="tg-kftd">0x00837FFF</td>
                <td class="tg-kftd">224.00 KB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">L2 for C66x_1</td>
            </tr>
            <tr>
                <td class="tg-6sgx">L2RAM_C66x_2</td>
                <td class="tg-6sgx">0x00800000</td>
                <td class="tg-6sgx">0x00837FFF</td>
                <td class="tg-6sgx">224.00 KB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">L2 for C66x_2</td>
            </tr>
            <tr>
                <td class="tg-kftd">MAIN_OCRAM_MCU2_0</td>
                <td class="tg-kftd">0x03600000</td>
                <td class="tg-kftd">0x0361FFFF</td>
                <td class="tg-kftd">128.00 KB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">Main OCRAM for MCU2_0</td>
            </tr>
            <tr>
                <td class="tg-6sgx">MAIN_OCRAM_MCU2_1</td>
                <td class="tg-6sgx">0x03620000</td>
                <td class="tg-6sgx">0x0363FFFF</td>
                <td class="tg-6sgx">128.00 KB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">Main OCRAM for MCU2_1</td>
            </tr>
            <tr>
                <td class="tg-kftd">L2RAM_C7x_1</td>
                <td class="tg-kftd">0x64800000</td>
                <td class="tg-kftd">0x64877FFF</td>
                <td class="tg-kftd">480.00 KB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">L2 for C7x_1</td>
            </tr>
            <tr>
                <td class="tg-6sgx">L1RAM_C7x_1</td>
                <td class="tg-6sgx">0x64E00000</td>
                <td class="tg-6sgx">0x64E03FFF</td>
                <td class="tg-6sgx">16.00 KB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">L1 for C7x_1</td>
            </tr>
            <tr>
                <td class="tg-kftd">MSMC_MPU1</td>
                <td class="tg-kftd">0x70000000</td>
                <td class="tg-kftd">0x7001FFFF</td>
                <td class="tg-kftd">128.00 KB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">MSMC reserved for MPU1 for ATF</td>
            </tr>
            <tr>
                <td class="tg-6sgx">MSMC_C7x_1</td>
                <td class="tg-6sgx">0x70020000</td>
                <td class="tg-6sgx">0x707E7FFF</td>
                <td class="tg-6sgx"> 7.78 MB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">MSMC for C7x_1</td>
            </tr>
            <tr>
                <td class="tg-kftd">MSMC_DMSC</td>
                <td class="tg-kftd">0x707F0000</td>
                <td class="tg-kftd">0x707FFFFF</td>
                <td class="tg-kftd">64.00 KB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">MSMC reserved for DMSC IPC</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU1_0_IPC</td>
                <td class="tg-6sgx">0x95100000</td>
                <td class="tg-6sgx">0x951FFFFF</td>
                <td class="tg-6sgx">1024.00 KB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU1_0 for Linux IPC</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU1_0_RESOURCE_TABLE</td>
                <td class="tg-kftd">0x95200000</td>
                <td class="tg-kftd">0x952003FF</td>
                <td class="tg-kftd">1024 B</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU1_0 for Linux resource table</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU1_0</td>
                <td class="tg-6sgx">0x95200400</td>
                <td class="tg-6sgx">0x963FFFFF</td>
                <td class="tg-6sgx">18.00 MB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU1_0 for code/data</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU1_1_IPC</td>
                <td class="tg-kftd">0x96400000</td>
                <td class="tg-kftd">0x964FFFFF</td>
                <td class="tg-kftd">1024.00 KB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU1_1 for Linux IPC</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU1_1_RESOURCE_TABLE</td>
                <td class="tg-6sgx">0x96500000</td>
                <td class="tg-6sgx">0x965003FF</td>
                <td class="tg-6sgx">1024 B</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU1_1 for Linux resource table</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU1_1</td>
                <td class="tg-kftd">0x96500400</td>
                <td class="tg-kftd">0x976FFFFF</td>
                <td class="tg-kftd">18.00 MB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU1_1 for code/data</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU2_0_IPC</td>
                <td class="tg-6sgx">0x97700000</td>
                <td class="tg-6sgx">0x977FFFFF</td>
                <td class="tg-6sgx">1024.00 KB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU2_0 for Linux IPC</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU2_0_RESOURCE_TABLE</td>
                <td class="tg-kftd">0x97800000</td>
                <td class="tg-kftd">0x978003FF</td>
                <td class="tg-kftd">1024 B</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU2_0 for Linux resource table</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU2_0</td>
                <td class="tg-6sgx">0x97800400</td>
                <td class="tg-6sgx">0x996FFFFF</td>
                <td class="tg-6sgx">31.00 MB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU2_0 for code/data</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU2_1_IPC</td>
                <td class="tg-kftd">0x99700000</td>
                <td class="tg-kftd">0x997FFFFF</td>
                <td class="tg-kftd">1024.00 KB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU2_1 for Linux IPC</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU2_1_RESOURCE_TABLE</td>
                <td class="tg-6sgx">0x99800000</td>
                <td class="tg-6sgx">0x998003FF</td>
                <td class="tg-6sgx">1024 B</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU2_1 for Linux resource table</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU2_1</td>
                <td class="tg-kftd">0x99800400</td>
                <td class="tg-kftd">0x9B6FFFFF</td>
                <td class="tg-kftd">31.00 MB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU2_1 for code/data</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU3_0_IPC</td>
                <td class="tg-6sgx">0x9B700000</td>
                <td class="tg-6sgx">0x9B7FFFFF</td>
                <td class="tg-6sgx">1024.00 KB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU3_0 for Linux IPC</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU3_0_RESOURCE_TABLE</td>
                <td class="tg-kftd">0x9B800000</td>
                <td class="tg-kftd">0x9B8003FF</td>
                <td class="tg-kftd">1024 B</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU3_0 for Linux resource table</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU3_0</td>
                <td class="tg-6sgx">0x9B800400</td>
                <td class="tg-6sgx">0x9DFFFFFF</td>
                <td class="tg-6sgx">40.00 MB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU3_0 for code/data</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU3_1_IPC</td>
                <td class="tg-kftd">0x9E000000</td>
                <td class="tg-kftd">0x9E0FFFFF</td>
                <td class="tg-kftd">1024.00 KB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU3_1 for Linux IPC</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU3_1_RESOURCE_TABLE</td>
                <td class="tg-6sgx">0x9E100000</td>
                <td class="tg-6sgx">0x9E1003FF</td>
                <td class="tg-6sgx">1024 B</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU3_1 for Linux resource table</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU3_1</td>
                <td class="tg-kftd">0x9E100400</td>
                <td class="tg-kftd">0x9EFFFFFF</td>
                <td class="tg-kftd">15.00 MB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU3_1 for code/data</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_C7x_1_IPC</td>
                <td class="tg-6sgx">0x9F000000</td>
                <td class="tg-6sgx">0x9F0FFFFF</td>
                <td class="tg-6sgx">1024.00 KB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for C7x_1 for Linux IPC</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_C7x_1_RESOURCE_TABLE</td>
                <td class="tg-kftd">0x9F100000</td>
                <td class="tg-kftd">0x9F1003FF</td>
                <td class="tg-kftd">1024 B</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for C7x_1 for Linux resource table</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_C7x_1_BOOT</td>
                <td class="tg-6sgx">0x9F200000</td>
                <td class="tg-6sgx">0x9F2003FF</td>
                <td class="tg-6sgx">1024 B</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for C7x_1 for boot section</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_C7x_1_VECS</td>
                <td class="tg-kftd">0x9F400000</td>
                <td class="tg-kftd">0x9F403FFF</td>
                <td class="tg-kftd">16.00 KB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for C7x_1 for vecs section</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_C7x_1_SECURE_VECS</td>
                <td class="tg-6sgx">0x9F600000</td>
                <td class="tg-6sgx">0x9F603FFF</td>
                <td class="tg-6sgx">16.00 KB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for C7x_1 for secure vecs section</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_C7x_1</td>
                <td class="tg-kftd">0x9F604000</td>
                <td class="tg-kftd">0xA3FFFFFF</td>
                <td class="tg-kftd">73.98 MB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for C7x_1 for code/data</td>
            </tr>
            <tr>
                <td class="tg-6sgx">TIOVX_LOG_RT_MEM</td>
                <td class="tg-6sgx">0xA4000000</td>
                <td class="tg-6sgx">0xA5FFFFFF</td>
                <td class="tg-6sgx">32.00 MB</td>
                <td class="tg-6sgx"></td>
                <td class="tg-6sgx">Memory for TI OpenVX shared memory for Run-time logging. MUST be non-cached or cache-coherent</td>
            </tr>
            <tr>
                <td class="tg-kftd">IPC_VRING_MEM</td>
                <td class="tg-kftd">0xA7000000</td>
                <td class="tg-kftd">0xA8FFFFFF</td>
                <td class="tg-kftd">32.00 MB</td>
                <td class="tg-kftd"></td>
                <td class="tg-kftd">Memory for IPC Vring's. MUST be non-cached or cache-coherent</td>
            </tr>
            <tr>
                <td class="tg-6sgx">APP_LOG_MEM</td>
                <td class="tg-6sgx">0xA9000000</td>
                <td class="tg-6sgx">0xA903FFFF</td>
                <td class="tg-6sgx">256.00 KB</td>
                <td class="tg-6sgx"></td>
                <td class="tg-6sgx">Memory for remote core logging</td>
            </tr>
            <tr>
                <td class="tg-kftd">TIOVX_OBJ_DESC_MEM</td>
                <td class="tg-kftd">0xA9040000</td>
                <td class="tg-kftd">0xACFDFFFF</td>
                <td class="tg-kftd">63.62 MB</td>
                <td class="tg-kftd"></td>
                <td class="tg-kftd">Memory for TI OpenVX shared memory. MUST be non-cached or cache-coherent</td>
            </tr>
            <tr>
                <td class="tg-6sgx">PCIE_QUEUE_SHARED_MEM</td>
                <td class="tg-6sgx">0xACFE0000</td>
                <td class="tg-6sgx">0xACFEFFFF</td>
                <td class="tg-6sgx">64.00 KB</td>
                <td class="tg-6sgx"></td>
                <td class="tg-6sgx">Memory for IPC over PCIe using shared memory. MUST be non-cached or cache-coherent</td>
            </tr>
            <tr>
                <td class="tg-kftd">PCIE_QUEUE_MIRROR_REMOTE_SHARED_MEM</td>
                <td class="tg-kftd">0xACFF0000</td>
                <td class="tg-kftd">0xACFFFFFF</td>
                <td class="tg-kftd">64.00 KB</td>
                <td class="tg-kftd"></td>
                <td class="tg-kftd">Reserved Memory for RAT mapping of remote PCIe IPC shared memory. MUST be non-cached or cache-coherent</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_SHARED_MEM</td>
                <td class="tg-6sgx">0xAD000000</td>
                <td class="tg-6sgx">0xB2FFFFFF</td>
                <td class="tg-6sgx">96.00 MB</td>
                <td class="tg-6sgx"></td>
                <td class="tg-6sgx">Memory for shared memory buffers in DDR</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_SHARED_MEM_BSW</td>
                <td class="tg-kftd">0xD3000000</td>
                <td class="tg-kftd">0xD4FFFFFF</td>
                <td class="tg-kftd">32.00 MB</td>
                <td class="tg-kftd"></td>
                <td class="tg-kftd">Memory for shared memory buffers in DDR, BSW shared memory</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU2_0_NON_CACHE</td>
                <td class="tg-6sgx">0xD5000000</td>
                <td class="tg-6sgx">0xD5FFFFFF</td>
                <td class="tg-6sgx">16.00 MB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU2_0 for non-cached heap</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU2_0_LOCAL_HEAP</td>
                <td class="tg-kftd">0xD6000000</td>
                <td class="tg-kftd">0xD6FFFFFF</td>
                <td class="tg-kftd">16.00 MB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU2_0 for local heap</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU2_1_NON_CACHE</td>
                <td class="tg-6sgx">0xD7000000</td>
                <td class="tg-6sgx">0xDDFFFFFF</td>
                <td class="tg-6sgx">112.00 MB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU2_1 for non-cached heap</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU1_0_LOCAL_HEAP</td>
                <td class="tg-kftd">0xDE000000</td>
                <td class="tg-kftd">0xDE7FFFFF</td>
                <td class="tg-kftd"> 8.00 MB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU1_0 for local heap</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU1_1_LOCAL_HEAP</td>
                <td class="tg-6sgx">0xDE800000</td>
                <td class="tg-6sgx">0xDEFFFFFF</td>
                <td class="tg-6sgx"> 8.00 MB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU1_1 for local heap</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU2_1_LOCAL_HEAP</td>
                <td class="tg-kftd">0xDF000000</td>
                <td class="tg-kftd">0xDFFFFFFF</td>
                <td class="tg-kftd">16.00 MB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU2_1 for local heap</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_MCU3_0_LOCAL_HEAP</td>
                <td class="tg-6sgx">0xE0000000</td>
                <td class="tg-6sgx">0xE07FFFFF</td>
                <td class="tg-6sgx"> 8.00 MB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for MCU3_0 for local heap</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_MCU3_1_LOCAL_HEAP</td>
                <td class="tg-kftd">0xE0800000</td>
                <td class="tg-kftd">0xE0FFFFFF</td>
                <td class="tg-kftd"> 8.00 MB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for MCU3_1 for local heap</td>
            </tr>
            <tr>
                <td class="tg-6sgx">DDR_C7X_1_SCRATCH</td>
                <td class="tg-6sgx">0xE1000000</td>
                <td class="tg-6sgx">0xE6FFFFFF</td>
                <td class="tg-6sgx">96.00 MB</td>
                <td class="tg-6sgx">RWIX</td>
                <td class="tg-6sgx">DDR for c7x_1 for Scratch Memory</td>
            </tr>
            <tr>
                <td class="tg-kftd">DDR_C7X_1_LOCAL_HEAP</td>
                <td class="tg-kftd">0x100000000</td>
                <td class="tg-kftd">0x105FFFFFF</td>
                <td class="tg-kftd">96.00 MB</td>
                <td class="tg-kftd">RWIX</td>
                <td class="tg-kftd">DDR for c7x_1 for local heap</td>
            </tr>
        </table>
    </body>
</html>

  • 0
    TI__Mastermind 41812 points

    Due to regional holidays in India, the assigned TI engineer is out of the office. There would be a 1-2 days delay in responding.

    Thanks.

  • 0 in reply to Praveen Rao
    TI__Guru* 81406 points

    Hi,

    the vxMapImagePatch is trying to allocate the memory in the shared mem. 

    You can enable the macro APP_MEM_DEBUG in the file app_mem_qnx.c to printout the information on the size it is trying to allocate.

    Regards,

    Nikhil

  • 0 in reply to Nikhil Dasan
    Prodigy 120 points

    Hi,

    We got the log from C7x_1, something like,[C7x_1 ]      3.880401 s: MEM: Allocated 128 bytes @ 0x054d5600. From those log, we found that the share memory size should be about 84MB.

    But as told before, when we set the share memory size as 94 MB, it would report shared mem ptr allocation failed.

    After we testing different size of share memory, the value of it should be about 373 MB to avoid those error.

    We want to know the reason of difference between theory value and actual value of share memory size. Did TI divide those memory for different core equally?

    c7x1_log.txt 
    1374 1970/01/01 08:00:01.796545 1.7965 12 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.400216 s: MEM: Allocated 62848 bytes @ 0x00000100
1375 1970/01/01 08:00:01.796545 1.7965 13 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.400401 s: MEM: Allocated 6878464 bytes @ 0x0000f800
1376 1970/01/01 08:00:01.796545 1.7965 14 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.411334 s: MEM: Allocated 384 bytes @ 0x0069ee00
1377 1970/01/01 08:00:01.796545 1.7965 15 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.412754 s: MEM: Allocated 15232 bytes @ 0x0069f100
1378 1970/01/01 08:00:01.796545 1.7965 16 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.412772 s: MEM: Allocated 256 bytes @ 0x006a2e00
1379 1970/01/01 08:00:01.796545 1.7965 17 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.412800 s: MEM: Allocated 6686336 bytes @ 0x006a3000
1380 1970/01/01 08:00:01.796545 1.7965 18 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.412865 s: MEM: Allocated 3277824 bytes @ 0x00d03800
1381 1970/01/01 08:00:01.796545 1.7965 19 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.412904 s: MEM: Allocated 906880 bytes @ 0x01023d00
1382 1970/01/01 08:00:01.796545 1.7965 20 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.412934 s: MEM: Allocated 4079616 bytes @ 0x01101500
1383 1970/01/01 08:00:01.796545 1.7965 21 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.412975 s: MEM: Allocated 128 bytes @ 0x014e5600
1384 1970/01/01 08:00:01.796545 1.7965 22 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.412986 s: MEM: Allocated 128 bytes @ 0x014e5800
1385 1970/01/01 08:00:01.796545 1.7965 23 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.429913 s: MEM: Freeing 384 bytes @ 0x0069ee00
1464 1970/01/01 08:00:01.899545 1.8995 58 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.497259 s: MEM: Allocated 62848 bytes @ 0x014e5a00
1465 1970/01/01 08:00:01.899545 1.8995 59 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.497446 s: MEM: Allocated 6693120 bytes @ 0x014f5100
1466 1970/01/01 08:00:01.899545 1.8995 60 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.509088 s: MEM: Allocated 384 bytes @ 0x0069ee00
1467 1970/01/01 08:00:01.899545 1.8995 61 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.511548 s: MEM: Allocated 15232 bytes @ 0x01b57300
1468 1970/01/01 08:00:01.900545 1.8995 62 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.511568 s: MEM: Allocated 256 bytes @ 0x01b5b000
1469 1970/01/01 08:00:01.900545 1.8995 63 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.511590 s: MEM: Allocated 6408448 bytes @ 0x01b5b200
1470 1970/01/01 08:00:01.900545 1.9005 64 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.511658 s: MEM: Allocated 399104 bytes @ 0x02177c00
1471 1970/01/01 08:00:01.900545 1.9005 65 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.511674 s: MEM: Allocated 1228928 bytes @ 0x021d9400
1472 1970/01/01 08:00:01.900545 1.9005 66 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.511698 s: MEM: Allocated 128 bytes @ 0x02305600
1473 1970/01/01 08:00:01.900545 1.9005 67 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.511709 s: MEM: Allocated 128 bytes @ 0x02305800
1474 1970/01/01 08:00:01.900545 1.9005 68 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.511721 s: MEM: Allocated 128 bytes @ 0x02305a00
1475 1970/01/01 08:00:01.900545 1.9005 69 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.529826 s: MEM: Freeing 384 bytes @ 0x0069ee00
1516 1970/01/01 08:00:01.951545 1.9515 71 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.581243 s: MEM: Allocated 62848 bytes @ 0x02305c00
1517 1970/01/01 08:00:01.951545 1.9515 72 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.581379 s: MEM: Allocated 4482560 bytes @ 0x02315300
1518 1970/01/01 08:00:01.951545 1.9515 73 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.588558 s: MEM: Allocated 384 bytes @ 0x0069ee00
1548 1970/01/01 08:00:02.002545 2.0025 74 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.588921 s: MEM: Allocated 15232 bytes @ 0x0275ba00
1549 1970/01/01 08:00:02.002545 2.0025 75 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.588941 s: MEM: Allocated 256 bytes @ 0x0275f700
1550 1970/01/01 08:00:02.002545 2.0025 76 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.588956 s: MEM: Allocated 4285056 bytes @ 0x0275f900
1551 1970/01/01 08:00:02.002545 2.0025 77 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.589009 s: MEM: Allocated 6494592 bytes @ 0x02b75d00
1552 1970/01/01 08:00:02.003545 2.0025 78 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.589085 s: MEM: Allocated 480640 bytes @ 0x031a7800
1553 1970/01/01 08:00:02.003545 2.0025 79 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.589101 s: MEM: Allocated 128 bytes @ 0x0321cf00
1554 1970/01/01 08:00:02.003545 2.0025 80 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.589114 s: MEM: Allocated 128 bytes @ 0x0321d100
1555 1970/01/01 08:00:02.003545 2.0035 81 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.589126 s: MEM: Allocated 128 bytes @ 0x0321d300
1556 1970/01/01 08:00:02.003545 2.0035 82 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.598084 s: MEM: Freeing 384 bytes @ 0x0069ee00
1557 1970/01/01 08:00:02.003545 2.0035 83 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.620212 s: MEM: Allocated 62848 bytes @ 0x0321d500
1558 1970/01/01 08:00:02.003545 2.0035 84 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.620324 s: MEM: Allocated 1693952 bytes @ 0x0322cc00
1559 1970/01/01 08:00:02.003545 2.0035 85 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.622987 s: MEM: Allocated 384 bytes @ 0x0069ee00
1560 1970/01/01 08:00:02.003545 2.0035 86 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.623964 s: MEM: Allocated 15232 bytes @ 0x033ca600
1561 1970/01/01 08:00:02.004545 2.0035 87 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.623982 s: MEM: Allocated 256 bytes @ 0x033ce300
1562 1970/01/01 08:00:02.004545 2.0035 88 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.624012 s: MEM: Allocated 1630464 bytes @ 0x033ce500
1563 1970/01/01 08:00:02.004545 2.0035 89 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.624025 s: MEM: Allocated 51584 bytes @ 0x0355c700
1564 1970/01/01 08:00:02.005545 2.0045 90 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.624039 s: MEM: Allocated 802688 bytes @ 0x03569200
1565 1970/01/01 08:00:02.005545 2.0045 91 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.624058 s: MEM: Allocated 128 bytes @ 0x0362d300
1566 1970/01/01 08:00:02.005545 2.0055 92 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.624069 s: MEM: Allocated 128 bytes @ 0x0362d500
1567 1970/01/01 08:00:02.005545 2.0055 93 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.624080 s: MEM: Allocated 128 bytes @ 0x0362d700
1568 1970/01/01 08:00:02.005545 2.0055 94 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.630896 s: MEM: Freeing 384 bytes @ 0x0069ee00
1622 1970/01/01 08:00:02.107545 2.1075 95 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.725221 s: MEM: Allocated 62848 bytes @ 0x0362d900
1623 1970/01/01 08:00:02.107545 2.1075 96 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.725407 s: MEM: Allocated 9459328 bytes @ 0x0363d000
1624 1970/01/01 08:00:02.107545 2.1075 97 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.740468 s: MEM: Allocated 384 bytes @ 0x0069ee00
1629 1970/01/01 08:00:02.158545 2.1585 99 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.746227 s: MEM: Allocated 15232 bytes @ 0x03f42800
1630 1970/01/01 08:00:02.158545 2.1585 100 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.746246 s: MEM: Allocated 256 bytes @ 0x03f46500
1631 1970/01/01 08:00:02.158545 2.1585 101 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.746261 s: MEM: Allocated 10580480 bytes @ 0x03f46700
1632 1970/01/01 08:00:02.158545 2.1585 102 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.746370 s: MEM: Allocated 312192 bytes @ 0x0495da00
1633 1970/01/01 08:00:02.158545 2.1585 103 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.746387 s: MEM: Allocated 1607808 bytes @ 0x049a9f00
1634 1970/01/01 08:00:02.158545 2.1585 104 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.746414 s: MEM: Allocated 128 bytes @ 0x04b32900
1635 1970/01/01 08:00:02.158545 2.1585 105 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.746425 s: MEM: Allocated 128 bytes @ 0x04b32b00
1636 1970/01/01 08:00:02.158545 2.1585 106 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.746437 s: MEM: Allocated 128 bytes @ 0x04b32d00
1643 1970/01/01 08:00:02.209545 2.2095 107 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.833372 s: MEM: Freeing 384 bytes @ 0x0069ee00
1687 1970/01/01 08:00:02.260545 2.2605 109 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.873111 s: MEM: Allocated 62848 bytes @ 0x04b32f00
1688 1970/01/01 08:00:02.260545 2.2605 110 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.873247 s: MEM: Allocated 3868544 bytes @ 0x04b42600
1689 1970/01/01 08:00:02.260545 2.2605 111 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.879333 s: MEM: Allocated 384 bytes @ 0x0069ee00
1690 1970/01/01 08:00:02.260545 2.2605 112 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.880247 s: MEM: Allocated 15232 bytes @ 0x04ef2f00
1691 1970/01/01 08:00:02.260545 2.2605 113 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.880265 s: MEM: Allocated 256 bytes @ 0x04ef6c00
1692 1970/01/01 08:00:02.260545 2.2605 114 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.880280 s: MEM: Allocated 3607168 bytes @ 0x04ef6e00
1693 1970/01/01 08:00:02.260545 2.2605 115 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.880327 s: MEM: Allocated 1770624 bytes @ 0x05267a00
1694 1970/01/01 08:00:02.260545 2.2605 116 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.880358 s: MEM: Allocated 774272 bytes @ 0x05418000
1695 1970/01/01 08:00:02.260545 2.2605 117 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.880377 s: MEM: Allocated 128 bytes @ 0x054d5200
1696 1970/01/01 08:00:02.260545 2.2605 118 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.880389 s: MEM: Allocated 128 bytes @ 0x054d5400
1697 1970/01/01 08:00:02.260545 2.2605 119 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.880401 s: MEM: Allocated 128 bytes @ 0x054d5600
1698 1970/01/01 08:00:02.260545 2.2605 120 ECU2 LOGS RPON 274450 log info verbose 1 [C7x_1 ]      3.891613 s: MEM: Freeing 384 bytes @ 0x0069ee00

  • +1 in reply to yichi zhang
    TI__Guru* 81406 points

    Hi,

    This log is from the C7x core, whereas the memory allocation for DDR_SHARED_MEM happens on A72. Can you check the mem logs on A72 for the same?

    Have you enabled the macro APP_MEM_DEBUG in the file app_mem_qnx.c ? If yes, this should have given logs on A72 and not C7x. Please check this again

    Regards,

    Nikhil