TMS320C6655: DDR3 memory data does not match when written and read.

jaein lee

If you have C6657 TI EVM in hand, please run the gel file test and the DDR3 sample, read-write test. ( The links for both the tests are given below )

1.GEl file test :- [FAQ] TMS320C6678: How to load and run the gel file on C6678 EVM? - Processors forum - Processors - TI E2E support forums

2. Sample DDR3 code:- https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1244930/faq-tms320c6678-ddr3-read-write-test-code-or-how-to-do-ddr3-test-on-c6678-evm-or-k2h-evm-board

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After running the these tests on TI-EVM board and your custom board, 

1. Compare the standard output messages of DDR3 initialization sequence of TI-EVM board and your board.

2. Spot the differences between the two.

 Regards

Shankari G

Unfortunately, we don't have an EVM board. However, we are testing it by checking and inserting the code for the initialize section in the GEL file.

Since the above symptom itself is not 100% reproducible and appears intermittently, it takes time to confirm.

Jaein lee, 

That's ok, Please take time.

Regards

Shankari G 

After testing 7 test devices for approximately 14 hours, the second of the above symptoms occurred in 3 devices.

It appears that data is not being read in blocks, or incorrect data is being written repeatedly in blocks.

Once the above symptoms appear, they will continue to repeat until the DSP is completely powered off.

Could the above symptom occur when there is a problem with the xmc_setup function?

jaein lee 

Have you compared the initialization sequence with the standard gel file? ( In the gel-video-link posted above has the standard output of TI-EVM )

After the initialization of DDR3 is completed, whether the DDR3 memory test started and passed in the gel file?

Would you please post your gel file output?

So that, I can compare your gel output with the TI-EVM output ( which I have in hand) and share it to you.

This way you can narrow down where the problem is...

Regards

Shankari G 

platform.cppevmc6657.cpp

Sorry for uploading the file like this.

There are too many things to upload all of them, so I'm uploading them like this. You just need to check the platform_init part and the evmc6657 file.

Thank you for always responding promptly.

If you need any information, please ask me anytime

P.S.) There is no special reason why I uploaded a file with the cpp extension. It just happened while I was copying the contents from somewhere else.

jaein lee 

I asked you the console output messages of gel execution on your board. Refer the gel output-console messages in the video link above....

I did not ask you to upload your gel file. Please note, you have uploaded your gel file..... !

Regards

Shankari G

Sorry, I think I misunderstood;

I guess I'll have to find a connector to directly view the output of that DSP. I'm currently changing the DSP in a different way.

jaein lee 

No need of any connector.

In ccs --> view --> console option.

open the console window and observe the output.

Regards

Shankari G

There was a mistake during the test, so I am checking it, so the answer is late.

We are using DDR3-1600 series, but we found out late that the DSP only supports up to 1333Mhz.

We are re-running the test after correcting all the calculation values.

And I don't know if I can ask a question here, but if I use DDR3-1600 memory with the speed lowered to 1333MHz, do I need to change all the values ​​for tRP, tRCD, tRC, etc. to 1333 memory specifications instead of 1600 memory specifications and input them?

Jaein Lee,

Yes. Ofcourse. For 1600 MTS and 1333 MTS, the values of tRP, tRCD, tRC will be different.

You may have to look into the data sheet of the DDR3- memory devices.

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PLEASE NOTE, HERE THE DATASHEET  WHICH I REFER IS NOT THE DATASHEET OF PROCESSOR ( c6657 )  DEVICE.

IT IS THE DATASHEET OF THE MEMORY YOU INTERFACE WITH DDR3 OF c6657.

According to those timing parameter values, the DDR3 register values have to be recalculated using this Excel sheet.

[FAQ] 66AK2E05: How to calculate the "DDR3 Interface – Registers" for Keystone II devices and Test/Debug on Keystone II EVM. - Processors forum - Processors - TI E2E support forums

[FAQ] TMS320C6657: How to calculate the "DDR3 Interface – Registers" for Keystone I devices and Test/Debug on Keystone I EVM. - Processors forum - Processors - TI E2E support forums

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C6657 is the keystone I device. The second link is relevant to it. But however, please visit the first link on keystone II devices too which has the complete explanation on the DDR3 spread sheet. 

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From you, I am looking for an output like below. Please post your board's output messages....

In my out put console messages below,  please focus on the DDR3 initialization, read and write tests getting passed.

C66xx_0: GEL Output: Setup_Memory_Map...
C66xx_0: GEL Output: Setup_Memory_Map... Done.
C66xx_1: GEL Output: Setup_Memory_Map...
C66xx_1: GEL Output: Setup_Memory_Map... Done.
C66xx_0: GEL Output: 
Connecting Target...
C66xx_0: GEL Output: DSP core #0
C66xx_0: GEL Output: C6657L GEL file Ver is 1.00800002 
C66xx_0: GEL Output: Global Default Setup...
C66xx_0: GEL Output: Setup Cache... 
C66xx_0: GEL Output: L1P = 32K   
C66xx_0: GEL Output: L1D = 32K   
C66xx_0: GEL Output: L2 = ALL SRAM   
C66xx_0: GEL Output: Setup Cache... Done.
C66xx_0: GEL Output: Main PLL (PLL1) Setup ... 
C66xx_0: GEL Output: PLL in Bypass ... 
C66xx_0: GEL Output: pll_multiplier = (19) 
C66xx_0: GEL Output: PLL1_PLLM = (19) 
C66xx_0: GEL Output: PLL1_CMD = (1) 
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
C66xx_0: GEL Output:            SYSCLK2 = 333.333344 MHz, SYSCLK5 = 200.0 MHz.
C66xx_0: GEL Output:            SYSCLK8 = 15.625 MHz.
C66xx_0: GEL Output: PLL1 Setup... Done.
C66xx_0: GEL Output: Power on all PSC modules and DSP domains... 
C66xx_0: GEL Output: Power on all PSC modules and DSP domains... Done.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup ... 
C66xx_0: GEL Output: DDR3 PLL Setup... Done.
C66xx_0: GEL Output: DDR3 Init begin (1333 auto)
C66xx_0: GEL Output: XMC Setup ... Done 
C66xx_0: GEL Output: IFRDY bit is SET: DDR3 Interface Ready
C66xx_0: GEL Output: 
DDR3 initialization is complete.
C66xx_0: GEL Output: DDR3 Init done
C66xx_0: GEL Output: DDR3 memory test... Started
C66xx_0: GEL Output: DDR3 memory test... Passed
C66xx_0: GEL Output: PLL and DDR3 Initialization completed(0) ...
C66xx_0: GEL Output: configSGMIISerdes Setup... Begin
C66xx_0: GEL Output: SGMII SERDES has been configured.
C66xx_0: GEL Output: Enabling EDC ...
C66xx_0: GEL Output: L1P error detection logic is enabled.
C66xx_0: GEL Output: L2 error detection/correction logic is enabled.
C66xx_0: GEL Output: MSMC error detection/correction logic is enabled.
C66xx_0: GEL Output: Enabling EDC ...Done 
C66xx_0: GEL Output: Global Default Setup... Done.

Regards

Shankari G

Thanks for the detailed answer.

However, I don't know what to do about the output message of the board you requested.

I don't have an EVM board, and I asked to buy an EVM board, but the dealer said they don't have one right now.

I tried to read the message from my device, but my device is currently set to use DSP binary via PCI.

I tried to connect the emulator, but it said there is no separate pin on the board to connect the connector.

What should I do in this case?

I don't know much about this part, so I'm sorry if it seems frustrating.

First, I will refer to the memory datasheet and proceed with the settings.

Regards

jaein lee

Not to lose hope.

1. At the first hand, check the datasheet of your memory device chosen and give appropriate timing parameter values for DDR3.

2. Though you do not have TI-EVM board, your newly design board may have some debugging method for your DSP-binary.

Please check out that. 

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Are you sure, there is no provision to connect to CCS to your custom board via any on-board emulator or an external JTAG?

Because, CCS and JTAG are crucial and important for debugging....

Regards

Shankari G

Thank you for your encouragement.

We were informed that the emulator owned by the team was broken.

To connect an external JTAG, I need to disassemble certain parts, so I'll have to talk to someone else.

And I have to request to purchase an emulator...

..

Additional testing will be conducted as soon as the working environment is established.

Regards

jaein lee

Sure, you can take time.

I will be waiting for you to support.    :-)

Regards

Shankari G

jaein lee

For the time being, I am closing this thread with your permission.

Whenever, you reply to this, it will re-open.

Is that OK?

Regards

Shankari G