C5504 DSP never goes into sleep (idle)

Hi Ti Tech Support,

I have followed TI documentation to make C5504 into idle state. It is not working at all. Wold you please provide me additional information?

Please help. Thanks.

Howard

One more time, here is the problem description:

1.       C5504 running at 150 MHz with external clock (12MHz)

2.       How to set DSP to be idle mode ( low power consumption) –

a.       Is RTC must be used? Possible to continue use external clock (12 MHz) and not to disable master clock?

 b.      With 150 MHz speed, is RTC still available?

 c.       Any example could be helpful

Thanks,

Howard

Thanks. With your suggestion, it is working. A bit confused with your statement about WAKEUP pin and INT0.

With same ICR setting (0x3EF), power consumption would be different in sleep mode when using wakeup pin or INT0 to wake-up DSP?

Brad,

Howard verified the answer but still has an additional question on optimization.  I just wanted to make sure this post wasn't considered closed.  Thanks.

Howard Wang said:

Thanks. With your suggestion, it is working. A bit confused with your statement about WAKEUP pin and INT0.

With same ICR setting (0x3EF), power consumption would be different in sleep mode when using wakeup pin or INT0 to wake-up DSP?

I am sorry for the brief answer. In order to achieve lowest power, we need to bring the DSP down to RTC-only mode, in which all CPU parts and peripherals are powered down and only WAKEUP pin can wake the DSP up. This mode is involved with more settings than just ICR configuration. Please refer to DSP and RTC datasheets for more details.

Hi Van,

Thanks for your information. Since we are using 150 MHz external clock with C5504, then CLK_SEL pin is connected to high to allow external clock to drive sys_clock and 32 KHz on-chip oscillator to drive RTC timer only.

In this case, is WAKEUP pin still available to wakeup CPU from idle instruction? Please help.

Thanks,

Howard

Yes, it will, since RTC activity is independent of system clock.

Cong Van Nguyen said:

I am sorry for the brief answer. In order to achieve lowest power, we need to bring the DSP down to RTC-only mode, in which all CPU parts and peripherals are powered down and only WAKEUP pin can wake the DSP up. This mode is involved with more settings than just ICR configuration. Please refer to DSP and RTC datasheets for more details.

 

Yes, it will, since RTC activity is independent of system clock.

The wakeup pin is available but our design is not  RTC-only mode, so it is not in lowest power mode. Correct?

Thanks,

Howard

Hi Howard,

No, you'll still be able to achieve RTC-only mode even if CLK_SEL is set for external source. The only difference is that SYSCLK is clocked at 150MHz rather than 32kHz in idle, but I am not sure whether this difference will make a significant increase of power consumption in RTC-only idle.

A workaround is to dedicate a GPIO output to drive CLK_SEL (CLK_SEL = 1 in normal DSP operation and = 0 during DSP sleep).

Cheers,

Cong-Van

Cong Van Nguyen said:

Hi Howard,

No, you'll still be able to achieve RTC-only mode even if CLK_SEL is set for external source. The only difference is that SYSCLK is clocked at 150MHz rather than 32kHz in idle, but I am not sure whether this difference will make a significant increase of power consumption in RTC-only idle.

A workaround is to dedicate a GPIO output to drive CLK_SEL (CLK_SEL = 1 in normal DSP operation and = 0 during DSP sleep).

Cheers,

Cong-Van

 

Hi Cong-Van,

Based on the datasheet of C5504,

"The CLK_SEL pin is required to be statically tied high or low and cannot
change dynamically after reset." - page 49.

Maybe it is not possible?

Thanks,

Howard

Hi Howard,

So that workaround may not work, but you are free to try.

BTW, why do you need to feed SYSCLK with an external clock? I prefer to use RTC clock instead because it is easier to synthesize any given SYSCLK frequency from a low reference frequency than from a high reference frequency.

Cheers,

Cong-Van

Cong Van Nguyen said:

Hi Howard,

So that workaround may not work, but you are free to try.

BTW, why do you need to feed SYSCLK with an external clock? I prefer to use RTC clock instead because it is easier to synthesize any given SYSCLK frequency from a low reference frequency than from a high reference frequency.

Cheers,

Cong-Van

Hi Cong-Van,

I agree with you using RTC is much easier. Only reason is that 150 MHz clock. RTC clock can only get up to 120 MHz clock. That is not fast enough with our algorithm.

Thanks,

Howard

Hi Cong-Van,

To further saving power, is it possible to turn off external clock when DSP is in sleep?

Thanks,

Howard

Hello,

I have similar issue with C5502 and was hoping someone might help.

I implemented IDLE mode 3 with PLL disabled according to the instructions giving in C5502 data manual SPRS166K. I used WDT to wake up the system after 1000ms. Every thing seems to work fine when I am using JTAG emulator however when I load the code into flash then system does not go to low power mode. I could not figure out what is making the system behave that way when i am running code from the flash. Any idea or suggestions are welcome.

Thanks,

Hi kashif,

Please open up a new thread as quesries posted on closed/old thread will get less attention than the new one.

Regards,

Shankari

Hi Shankari,

Thanks for your reply. I did open a new thread on March 18th with the subject "C5502 IDLE mode 3 - strange behaviour" but never got any response back. Can you please respond to my post "C5502 IDLE mode 3 - strange behaviour" posted on March 18th.

Thanks,

-Kashif

Hi kashif,

Sorry for the inconvenience caused. I will take forward your ( both the posts ) to concerned department.

Regards,

Shankari