EVM6678L: Timers don't stop when halting the target

Lothar Eckler87661

Timers, once started, don't stop when halting the target, for example at a break point or while single stepping. (The "Continuous Refresh" option in the watch window shows all active timers counting, while TSCL is not)

The test uses the internal clock and the resp. register EMUMGT_CLKSPD is 0x00060000, so the timers should stop immediately. All local and global timers behave the same.

My board rev. is 1.0, I am starting up with the standard POST configuration. CCS is V5.0.3 (even tested with V 4.1.2).

The same test run on EVM 6472L is working as expected, the timers stopping properly.

Something wrong with my EVM or the debug configuration?

Someone knows the solution?

Thanks!

Lothar

over 13 years ago

0 DanRinkes over 13 years ago

TI__Expert 8055 points

Lothar,

Can you send me a small test case that shows this? From the documentation that I read, I agree with you. The EMUGMT_CLKSPD register is set correctly. It's possible that this is a problem with the actual timer in 66x, or at least I'd like to test it. I think your CCS setup is fine, because all it would do is set the CPU registers to behave in the desired way, but we both think these are correct. I also don't think this can be specific to your board setting.

Regards,

Dan

0 Lothar Eckler87661 over 13 years ago in reply to DanRinkes

Prodigy 120 points

Dan,

thank you for replying. The stripped-down test case is as follows.

// Very simple test showing the "timer doesn't stop" problem

// Set to watch window:

// TSCL, maybe TSCH

// *(0x02200010) or resp. address (CNTL)

// *(0x02200004) or resp. address (EMUMGT_CLKSPD)

// and set the "Continuous Refresh" option

// Start the program and stop it, TSCL is stopped, CNTL doesn't stop counting

// By ASM single stepping TSCL is incremented, but CNTL is counting unimpressed

// Basic types

typedef unsigned int u32;

// Register addresses

// 6678 Timer registers

// LocalTimerBase = 0x0220000 + CoreNum * 0x00010000;

// GlobalTimerBase = 0x0220000 + 0x00080000 + N * 0x00010000;

#define LT_BASESTART 0x02200000

#define LT_EMUCLK (LT_BASESTART+0x0004)

#define LT_CNTL (LT_BASESTART+0x0010)

#define LT_CNTH (LT_BASESTART+0x0014)

#define LT_PRDL (LT_BASESTART+0x0018)

#define LT_PRDH (LT_BASESTART+0x001c)

#define LT_TCR (LT_BASESTART+0x0020)

#define LT_TGCR (LT_BASESTART+0x0024)

#define LT_WDTCR (LT_BASESTART+0x0028)

// Function: CfgTimer

void CfgTimer( void )

{

*((u32 *)LT_TCR) = 0x00000000; // Disable Timer (TCR = 0)

*((u32 *)LT_EMUCLK) = 0x00000000;

*((u32 *)LT_CNTL) = 0; // Reset CNTLO

*((u32 *)LT_CNTH) = 0; // Reset CNTHI

*((u32 *)LT_PRDL) = 10000000; // PRDLO

*((u32 *)LT_PRDH) = 0; // PRDHI

}

// Function: StartTimer

void StartTimer( void )

{

*((u32 *)LT_TCR) = 0x00000080; // TCR

*((u32 *)LT_TGCR) = 0x00000003; // TGCR

}

// Function: main

void main(void)

{

// Start TSCL/H counting

asm(" MVC B1,TSCL ");

// Setup and start timer

CfgTimer();

StartTimer();

while( 1 );

}

As mentioned, (only with changed timer base address) it works fine on EVM6472L.

Regards

Lothar

0 HRi over 13 years ago in reply to Lothar Eckler87661

Guru 10750 points

Hi Dan,

I see the same non-stopping issue, any reason for it?

Thanks,

0 DanRinkes over 13 years ago in reply to HRi

TI__Expert 8055 points

Lothar, HR,

Sorry, I finally was able to get back to this. I can verify that I see the same behavior that you see. I have been in contact with the Hardware design team to see why this is and if there is some way to work around it. I will keep you updated.

Regards,

Dan

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EVM6678L: Timers don't stop when halting the target