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TDA4VH-Q1: SERDES0's PCIe1 & PCIe3 cannot work at same time?

Sai Wang
Prodigy 171 points
Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: TDA4VH

Tool/software:

Dear expert:

My configuration is:

  •     Serdes0 lane0 & lane 1 :  PCIe 1 x2  for EP Xilinx FPGA, 8GT/s
  •     Serdes0 lane2 & lane 3 :  PCIe 3 x1: connects to Intel i226 which is fixed mounted on my TDA4VH board., 5GT/s

Problem:

  •   Boot up with i226 only, then hot plug in FPGA board, system crash most time, some times not crash, but can't detect FPGA EP, only i226 detected.  Observed register value varies when not crash 
    • Keep FPGA connected: Register 0x02937014 is 0x0200 0009   Register 0x02917014 is 0x1000 0127
    • Remove FPGA::             Register 0x02937014 is 0x1000 0113   Register 0x02917014 is 0x0000 0024 
  • Insert FPGA in advance with I226 together, can boot up successfully, but can only detect FPGA  8GT/s.  

   its wired, can you help me  find what's the problem?

2024-11-06

We made some progress  that seems  PCIE1 & PCIE 3  have to work as the same speed .  when set FPGA FP to 5GT/s(origin ： 8GT/s )   TDA4VH can find two device. my case is 5GT/s 

Can you help me with this？ 

 

  • 0
    TI__Mastermind 36272 points

    Hi Sai,

    A couple of questions and experiments:

    1. Which SDK version is this? Is this 10.0 SDK version?
    2. Is this a custom board or the TI EVM?
    3. Share complete boot logs from when you have both FPGA and i226 connected on the system
    4. Could you try connecting just the FPGA (at the original default 8GT/s) and post output from "lspci -vvv"
    5. Could you try connecting just the i226 and post output from "lspci -vvv"
    6. Try connecting two i226 devices and share boot logs

    My goal from these questions are:

    • See if there is a known issue with the SDK version in-use
    • Know if I should consider hardware issues/differences from TI EVM
    • Know how it is failing
    • Know capabilities of FPGA and i226
    • See if we can isolate the issue to initializing a specific device (I've seen some FPGA can have some unique behaviors)

    Regards,

    Takuma