TDA4VP-Q1: Failed to load U-Boot to the EMMC on custom board

Hi,

Updating...

After I power off the board->change to EMMC bootmode->power on the board I have U-boot from EMMC.
Is it can be related to  EXT_CSD[162] bit? I need to write: mmc rst-function 0 1(According to https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-j784s4/10_00_00_08/exports/docs/linux/Foundational_Components/U-Boot/UG-Memory.html)?

If yes, what the mean of the warning:  This is a write-once field.? Can I flash the EMMC again? Is it can influence on other things? 

HI Rachel,

Actually the offsets where changed in the SDK which you are using.

Sorry for that.

Can you try the new offsets using the below commands.I have made the changes required in bold.

=> mmc dev 0 1
=> mmc erase 0x0 0x800
=> loadb 0x82000000
Send the tiboot3.bin file via Kermit

=> mmc write 0x82000000 0x0 0x800
=> mmc erase 0x800 0x1000
=> loadb 0x82000000
Send the tispl.bin_unsigned file via Kermit
=> mmc write 0x82000000 0x800 0x1000
=> mmc erase 0x1800 0x2000
=> loadb 0x82000000
Send the u-boot.img_unsigned file via Kermit
=> mmc write 0x82000000 0x1800 0x2000

=> mmc partconf 0 1 1 1
=> mmc bootbus 0 2 0 0

Hi Gokul,

Thanks on your answer.

I changed the offset in 

configs/j784s4_evm_r5_defconfig:
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400

And in configs/j784s4_evm_a72_defconfig:
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1800
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
Before I compiled and flashed the U-Boot files, So I think that the offsets aren't the issue.

And After I power off the board->change to EMMC bootmode->power on the board I have U-boot from EMMC

U-Boot SPL 2023.04-dirty (Nov 07 2024 - 09:02:49 +0200)
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed -121
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
i2c_write: error waiting for data ACK (status=0x116)
tps6287x_regulator tps62873@40: CTRL2 reg read failed: -121
SPL initial stack usage: 13456 bytes
Trying to boot from MMC1
Loading Environment from nowhere... OK
init_env from device 17 not supported!
Starting ATF on ARM64 core...

NOTICE:  BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b8-dirty
NOTICE:  BL31: Built : 07:38:16, Oct  8 2024
I/TC:
I/TC: OP-TEE version: 4.1.0-51-g012cdca49 (gcc version 13.2.1 20231009 (Arm GNU Toolchain 13.2.rel1 (Build arm-13.7))) #1 Tue Oct  8 10:50:04 UTC 2024 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: GIC redistributor base address not provided
I/TC: Assuming default GIC group status and modifier
I/TC: SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Fixing SA2UL firewall owner for GP device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot

U-Boot SPL 2023.04-dirty (Nov 07 2024 - 09:04:07 +0200)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
Trying to boot from MMC1


U-Boot 2023.04-dirty (Nov 07 2024 - 09:04:07 +0200)

SoC:   J784S4 SR1.0 GP
Model: Texas Instruments J784S4 EVM
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed -121
Board: J784S4-EVM rev E1
DRAM:  2 GiB
idle-statesCore:  92 devices, 32 uclasses, devicetree: separate
Flash: 0 Bytes
MMC:   mmc@4f80000: 0, mmc@4fb0000: 1
Loading Environment from nowhere... OK
In:    serial@2820000
Out:   serial@2820000
Err:   serial@2820000
am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA02102 cpsw_ver: 0x6BA82102 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed -121
Net:   Rachel phy_init
Rachel CONFIG_PHY_FIXED
Rachel phy_fixed_init
am65_cpsw_nuss_port ethernet@46000000port@1: can't parse phy-handle port 1 (-2)
eth0: ethernet@46000000port@1
Hit any key to stop autoboot:  0
=>

Can you see please on my update before and tell me if is it can be related to  EXT_CSD[162] bit? I need to write: mmc rst-function 0 1(According to https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-j784s4/10_00_00_08/exports/docs/linux/Foundational_Components/U-Boot/UG-Memory.html)?

If yes, what the mean of the warning:  This is a write-once field.? Can I flash the EMMC again? Is it can influence on other things? 
When I do reset by software the boot from EMMC stuck in the middle.

Thanks,
Rachel

Hi Rachel,

Rachel Mizrachi said:

After I power off the board->change to EMMC bootmode->power on the board I have U-boot from EMMC.
Is it can be related to  EXT_CSD[162] bit? I need to write: mmc rst-function 0 1(According to https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-j784s4/10_00_00_08/exports/docs/linux/Foundational_Components/U-Boot/UG-Memory.html)?

If yes, what the mean of the warning:  This is a write-once field.? Can I flash the EMMC again? Is it can influence on other things? 

No,that is not related to EXT_CSD[162] bit.This bit is responsible for resetting the EMMC when it is powered on.

The warning means that once the bit is set,it cannot be cleared back as it is a write-once field.