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AM5748: AM5748 linux kernel 4.14 : PCIe Inbound configuration issue , as RC

Phaneesh A
Prodigy 210 points
Part Number: AM5748

Tool/software:

Hi ,

        

                We are using AM5748 as RC and  FPGA as EP , We need to send data from FPGA to AM5748 for that we need to setup inbound configuration settings in AM5748 , but we don't have inbound settings in drivers/pci/dwc/pcie-designware-host.c  kernel RC driver, so in pcie-designware-host.c , Now I have added the inbound part dw_pcie_prog_inbound_atu() in dw_pcie_setup_rc() settings where I'm setting the ATU lower target address to 0x20013000  same as previous outbound configuration (taken from the device tree) and I'm configuring RC's and EP's BAR_0(via ECAM) register to 0x20400000, and then on the FPGA side we are pushing the data. But on the ARM side we are not receiving any data at 0x20400000 and also we are observing that whenever we are initiating the transaction on FPGA side ,PCIECTRL_RC_DBICS_DEV_CAS register bit[18] is setting which is Fatal Error Detected , so when I browsed related to this issue I'm seeing that this will occur when ATU is not configured properly.

So my first question is are we configuring the ATU properly ?

If no then give us  reference  for inbound configuration, please reply to this post ASAP.

Thanks ,

Phaneesh  A Kashyap

  • 0
    TI__Guru 50403 points

    Hi Phaneesh,

    I do not have any reference materials I can give for setting up ATU properly. However, I do see something that may be an issue. By default dw_pcie_prog_inbound_atu is using BAR matching mode. This is not the recommended for RC.

    TRM would be the best place to look at how PCIe should be configured and according to the TRM, it looks like address matching mode is the preferred method for RC.

    Regards,

    Takuma

  • 0 in reply to Takuma Fujiwara
    Prodigy 210 points

    Hi  Takuma ,

    Takuma Fujiwara said:
    I do see something that may be an issue. By default dw_pcie_prog_inbound_atu is using BAR matching mode. This is not the recommended for RC.

              Yeah , by default dw_pcie_prog_inbound_atu BAR matching is enabled in inbound ATU, so I've disabled it and tried still I'm not receiving any  data , and still PCIECTRL_RC_DBICS_DEV_CAS register bit[18] is setting which is Fatal Error Detected.

    We are not getting where we are missing, if you have any pointers regarding this issue that will be helpful.

    Thanks

    Phaneesh

  • 0 in reply to Phaneesh A
    TI__Guru 50403 points

    Hi Phaneesh,

    Again, TRM will be the best location for information. We do not have company internal information or examples for setting inbound ATU for PCIe on AM57x. I understand that TRM is a large read, but reading through this will give you some points to consider for debug. 

    For example, like below info:

    Essentially, PCIe tries to access PCIe address, and in Linux (at least for our newer AM6x/J7x devices) we declare a range for PCIe data in device tree: https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/ti/k3-j721e.dtsi#L110

    I assume something similar might be needed for AM57x. Otherwise, section 25.9.x should give you some other pointers to check.

    Regards,

    Takuma