TMDS64EVM: detection of UART break signal

Hello,

Can you please specify from which SDK point of view you are talking about this?

Is it MCU PLUS SDK or Processor SDK Linux?

Regards,

Vaibhav

Hello Vaibhav Kumar.
Thank you for your reply.

I'm using mcu_plus_sdk_am64x_08_06_00_45.

Is the following procedure for detecting a BREAK signal correct?

The PC (Teraterm) and TMDS64EVM are connected via UART.

Beforehand, set LINE_STS_IT and RHR_IT to 1 in the UART_IER_UART register to enable interrupts.

1. Send a break signal from Teraterm.

2. A UART interrupt occurs in TMDS64EVM and the interrupt handler is called.

3. In the interrupt handler, check that IT_TYPE in the UART_IIR_UART register is 3h (Receiver line status error).

4. Check that RX_BI in the UART_LSR_UART register is 1 and determine that a break signal has been received.

5. Read UART_RHR to clear the interrupt cause.

Best regards,
Kiyomasa Imaizumi.

Hello,

Kiyomasa Imaizumi said:

Is the following procedure for detecting a BREAK signal correct?

I have gone through the steps you have mentioned, looks good. Did you write this on your own, or you referred one of the TI documentation?

Also, can you tell me why break signal is required?

This is usually required when the Transmitter is sending at a lower speed than the receiver is expecting.

Regards,

Vaibhav

Hello Vaibhav Kumar.

Thank you for your reply.

I came up with the above procedure myself.
I only referenced the UART register information from TRM.
The reason for using the BREAK signal is to perform one-to-many UART communication via RS485.
The next data after receiving the BREAK signal will be interpreted by all MCUs.

Best regards,
Kiyomasa Imaizumi.

Hello Kiyomasa,

Not sure if we support this at the moment.

I am checking internally and I mailing the SW dev to get more idea on this.

Regards,

Vaibhav

Hi Kiyomasa,

I can provide latest updates on this by Monday of next week.

EDIT: Due to other high priority issues, will be looking at this thread a bit later, I will update here when I start working on this.

Thanks,

Vaibhav

Hello Vaibhav Kumar.

I think that when a break signal is received, RX_BI in the LSR becomes 1.
Will RX_FE also become 1?
In this case, will a single break signal cause two Receiver line status error interrupts, one for RX_BI and one for RX_FE?
Also, is it necessary to read RHR twice?
Please tell me the procedure for clearing the cause of an interrupt when it occurs.

Best regards,

Kiyomasa Imaizumi.

Hi Kiyomasa,

The UART break signal is not currently supported from our end.

I can help a bit further if you can help me with the steps to reproduce this(which you already shared) and the code/project file as well which I can directly run on the TI EVM.

Regards,

Vaibhav

Hello Vaibhav Kumar.

I am attaching the project file.
The SDK is mcu_plus_sdk_am64x_08_06_00_45.
I used uart_echo_low_latency_interrupt_am64x-evm_a53ss0-0_nortos_gcc-aarch64.
App_uartUserISR is executed when a break signal is sent from Teraterm.
RX_BI is set for LSR. Doesn't RX_FE become 1?
UART_getChar is called to clear the interrupt.Is that correct?

Best reagrds,
Kiyomasa Imaizumi.

uart_echo_low_latency_interrupt_am64x-evm_a53ss0-0_nortos_gcc-aarch64.zip

Hello Kiyomasa,

Thanks for attaching the project file. The responses were delayed due to holidays.

Can you please allow me time until Monday to try and test this out. I will ask you follow up questions if I have any.

Please comment on the method you used for SoC Initialization, is it SBL Null using UART Uniflash?

Also can you try running these experiments on the latest MCU PLUS SDK? 

Release notes of the latest SDK: https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/10_01_00_32/exports/docs/api_guide_am64x/RELEASE_NOTES_PAGE.html

Download it from: https://www.ti.com/tool/download/MCU-PLUS-SDK-AM64X/10.01.00.32

Regards,

Vaibhav

Hello Vaibhav Kumar.

Thank you for your reply.

I am using SBL Null.
For convenience, I use am64x_08_06_00_45 for the SDK.

Best regards,
Kiyomasa Imaizumi.