On behalf of my customer:
I'm using the LogicPD Experimenter EVM with the OMAP-L138 SOM and executing code on the C6748 core.
Initially I was using the DSP ExP SATA test (provided by LogicPD) to verify disk spinup (which works with my 500GB SATA2 disk).
Now, I'm using SYS/BIOS with Code Composer Studio 4.2.3, same hardware.
I need to measure the SUSTAINED TRANSFER RATE to move a very large chunk of continuous (real-time) data (> 90 GB) from the UPP port to a SATA2 hard disk, presumably using at least one, if not both, dedicated peripheral DMA blocks. Initially, no core processing is required, just want to 'pipe' the data through and find out how fast I can go (and still keep up with an input sample rate).
I’ve been through A LOT OF DOCUMENTATION from TI’s website; User Guides, Application Notes, Reference Guides but not fully appreciating all the software components necessary to perform this exercise.
I expect that I should be using the UPP and SATA PSP packages in order to configure each of the peripherals. However, TI's most recent version seems to be only compliant with DSP/BIOS (i.e. BIOS5). Is there another version I should be looking for, or is there a systematic way of converting BIOS5 to BIOS6? (file locations appear to have changed along with function naming). There’s a ‘migration’ Application Note, but I’m STARTING with SYS/BIOS. Shouldn’t there be a SYS/BIOS PSP package already available?
Several questions have presented themselves:
1) Does sample code already exist for this type of exercise?
Section 3.4.8 of the C6748 BIOSPSP datasheet suggests that it does, in that it specifies SATA write performance.
Maybe something is available from TI labs?
2) What mechanisms are available to measure the time taken to perform this data transfer?
No cycle count registers in this part; configure a hardware timer?
3) Do I need other libraries and/or packages?
It looks like the EDMA3 package will not work, since each peripheral already has DMA functionality.
4) For this first pass, am I better off implementing this outside of SYS/BIOS, say using the BSL package?
For simplicity, or performance, sake.
5) Is it possible to get the source code for the HddInfiniteRdWr test that we exercised when testing our hard drives?
In other words, does it even make sense from a data flow perspective:
UPP/DMA->L1DATA->SATA/DMA?