AM4372: Timing of GPMC synchronization mode for AM4372

SHENG YANG

Part Number: AM4372

Tool/software:

HI。TEAMS

If the synchronization mode of AM4372 selects 16 bits for data, does it take 16 clock cycles to read 16 bits? Is AM4372 16 bit parallel port parallel to serial?

9 months ago

0 Kallikuppa Sreenivasa 9 months ago

TI__Guru**** 189669 points

Hello SHENG YANG

Thank you for the query.

GPMC is a parallel bus. I would expect the 16 bit data to be read for every clock.

SHENG YANG said:
Is AM4372 16 bit parallel port parallel to serial?

Please eloborate.

Regards,

Sreenivasa

0 SHENG YANG 9 months ago in reply to Kallikuppa Sreenivasa

Expert 1320 points

HI。Kallikuppa Sreenivasa

Are D0, D1, D2, and D3 in the above diagram 1-bit or 16-bit?

Can the GPMC interface support DMA transfers for 8 channels?

EDMA has a total of 64 channels. When GPMC is reading data, can the data be allocated to 8 of these channels?

Now it is necessary to read data from the FPGA through the GPMC interface. There are 8 packets of data, each packet containing 4 bytes. After GPMC receives the 8 packets of data, can 8 channels of DMA be configured to transfer the data?

0 Ashwani Goel 7 months ago in reply to SHENG YANG

TI__Mastermind 27280 points

Hi,

Closing the thread, as there is no response for long. Feel free to ping back, if you want to continue discussion.

Regards

Ashwani

Processors

Processors forum

AM4372: Timing of GPMC synchronization mode for AM4372