I wanted to verify SRIO transfer speeds on the TMS320C6670. The sprabi2 Hardware design guide (Section 7.5) states that 6.25 Gbps transfer speeds are possible, where the sprugw1 Keystone Architecture Serial RapidIO document kind of contradicts that in places. Section 1.2 states:
• Support for 1.25, 2.5, 3.125, and 5 Gbps rates
And table 2-7 also does not show 6.25 Gbps transfer speeds, however table 3-70 says you can set BAUD_SEL in SP(n)_CTL2, GB_6p25 and GB_6p25_EN to enable 6.25 Gbps transfers.
I’m assuming the earlier parts in the document (Section 1.2 and Table 2-7) were copied from an older part that did not support these speeds, but the part actually does support it. Can someone verify the maximum data rata for the SRIO interface? Documentation may need to be corrected.
