Part Number: DRA829V
Other Parts Discussed in Thread: DRA829
Tool/software:
Hello,
I am working on UART module. I want to use UART Module in FIFO Polling Mode with FIFO enabled for 64 bytes. I am refering to the Chapter 12.1.6.4.6.3 FIFO Polled Mode Operation in the Technical Reference Manual.
It says that "In FIFO polled mode (the [0] FIFO_EN bit is set to 0 and the relevant interrupts are disabled by the register), the status of the receiver and transmitter can be checked by polling the line status register ()".
Does it means that to use 64 byte FIFO in polling mode, the UART_FCR register - FIFO_EN field need to be set to 0 ?
Best Regards,
Vivek
