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Boot pin status register?

Tim Sloper
Intellectual 1750 points

Is there a register that provides the latched values of the boot mode pins? I did not see this in the reference manual  

Thanks,

Tim

  • 0
    TI__Genius 15310 points

    Tim,

    The register that provides the latched values of the boot mode pins is CONTROL_STATUS in the Control Module doc.  Unfortunately, this doc is not available until next 2 week in the new TRM in DM8148 product folder.  The address for this CONTROL_STATUS is:

    CONTROL_STATUS addr = Control Module base address fr. Data Sheet + CONTROL_STATUS offset= 0x4814_0000 + 0x40 = 0x4814_0040.

    Regards,

    Viet

  • 0 in reply to Viet Dinh
    TI__Genius 15310 points

    This is the definition of the CONTROL_STATUS:

     

    The CONTROL_STATUS register reflects the system boot values as sampled when the power-on reset (PORz) or warm reset (RESETz) signal goes high. Please refer to the device datasheet for specific information about the boot configurations.

    Table 5‑7.  CONTROL_STATUS Description

     

    Bits

    Field

    Description

    Reset Val

    Access

    31:27

    Rsvd

    Reserved – Read returns 0

    0x000

    RO

    26

    BOOT[11]

    RSTOUT latch config

    0 – RSTOUT only outputs OR of all WD Timer reset outputs in the device.

    1 – RSTOUT outputs OR of all WD timer reset outputs and other reset sources[Veettil1] (PORz, Warm reset(RESETn),Emulation reset, SW reset, Reset generated due to unsupported device type etc)

    from BOOT11

    pins

    R/W

    25

    BOOT[10]

    Read customer specific preprogrammed IDs for

    PCIe/USB and NAND ROM

    from BOOT10

    pins

    R/W

    24:20

    BOOT[9:5]

    Refer to device datasheet for specific information

    From BOOT[9:5] pins

    R/W

    19:18

    ADMUX

    GPMC CS0 Default Address Muxing

      00 – No Addr/Data Muxing
      01 – Addr/Data Muxing
      10 – Addr/Addr/Data Muxing
      11 – Reserved

    from BOOT[14:13]

     pins

    R/W

    17

    WAITEN

    GPMC CS0 Default Wait Enable

      0 – Ignore WAIT input
      1 – Use WAIT input

    from BOOT15

     pin

    R/W

    16

    BW

    GPMC CS0 Default Bus Width

      0 – 8-bit data bus
      1 – 16-bit data bus

    from BOOT12

     pin

    R/W

    15:11

    Rsvd

    Reserved – Read returns 0

    5b00000

    RO

    10:8

    Rsvd

    Reserved – Read returns 011

    011

    RO

    7:5

    Rsvd

    Reserved – Read returns 0

    3b000

    RO

    4:0

    SYSBOOT

    System Boot Type

    from BOOT[4:0]

    pins

    R/W

     

     [Veettil1]Clean up