ECC Address For MSRAM Related query

Debashis Mahanty

Part Number: SK-AM62P-LP

Tool/software:

Hi Experts,

After reading the TRM document. we understand that ECC is running internally but just for logic verification and for sil certification we require to verify the error catch in ESM.

we are using Mcu+sdk(10.00.00.14) example code.
ecc section code is avail for mcan1 we have changed to mcu msram.

Changes that we made
in ecc_init

result = SDL_ECC_init(SDL_MCU_MSRAM_256K0_MSRAM32KX64E_ECC_AGGR,&ECC_Test_MCUMCAN1ECCInitConfig1);  // given proper ramid as per msram

done some changes in runECC2BitMCUMCAN1_InjectTest functions
1. I can't able to found the mapping table for this address but when I search this mcan address in TRM I got in firewall region. similar I look for SRAM. can you please tell how can I get this address for each aggregator.

injectErrorConfig.pErrMem = (uint32_t *)(0x79100000u);
injectErrorConfig.flipBitMask = 0x101;
result = SDL_ECC_injectError(SDL_MCU_MSRAM_256K0_MSRAM32KX64E_ECC_AGGR,
                                 SDL_MCU_MSRAM_256K0_MSRAM32KX64E_ECC_AGGR_MSRAM32KX64E_MSRAM0_ECC0_RAM_ID,
                                 SDL_INJECT_ECC_ERROR_FORCING_1BIT_ONCE,
                                 &injectErrorConfig);

Output:
Its fail when i access bitmask = 0x101;
But its waiting for interrupt in bitmask = 0x10; but the esm module is not at all triggered.

ECC Example Application

ECC_Example_init: Init MAIN ESM complete 

ECC_Example_init: Init WKUP ESM complete 

ECC_init: MCU MCAN1 ECC Init complete 

ESM Safety Example tests: starting

MCU MCAN1 Double bit error inject Example test UC-1: starting

MCU MCAN1 Double bit error inject test: pError address 0x79100000 test complete and the value is 0x43F0E92D

Waiting for ESM Interrupt

ESM_ECC_Example_run: UC-1 has failed-1 esm error is 0...

ECC Safety Example tests: failed

ECC UC-1 and UC-2 Test

Some Use_Cases have failed.

Can you please give me this address ranges for all this aggregators.

Regards,
Debashis

2 months ago

0 Nihar Potturu 2 months ago

TI__Genius 13606 points

Hello Debashis,

Debashis Mahanty said:
an you please tell how can I get this address for each aggregator.

The sdl_ecc_soc(mcu_plus_sdk_am62px_10_00_00_14_1/source/sdl/ecc/soc/am62px/sdl_ecc_soc.h).h file would have the addresses updated for different RAM IDs

Did you update the ECC_Test_MCUMCAN1ECCInitConfig structure with the MSRAM RAM ID instead of the default MCAN RAM ID. Without this the SDL_ECC_Init would fail and the error injection would not work.

Regards,

Nihar Potturu.

0 Debashis Mahanty 2 months ago in reply to Nihar Potturu

Intellectual 486 points

Hi Nihar,

Nihar Potturu said:
Did you update the ECC_Test_MCUMCAN1ECCInitConfig structure with the MSRAM RAM ID instead of the default MCAN RAM ID. Without this the SDL_ECC_Init would fail and the error injection would not work.

Yes you can check this.

static SDL_ECC_MemSubType ECC_Test_MCUMCAN1subMemTypeList1[MCUMCAN1_MAX_MEM_SECTIONS] =
{
 SDL_MCU_MSRAM_256K0_MSRAM32KX64E_ECC_AGGR_MSRAM32KX64E_MSRAM0_ECC0_RAM_ID,
};
static SDL_ECC_InitConfig_t ECC_Test_MCUMCAN1ECCInitConfig1 =
{
    .numRams = MCUMCAN1_MAX_MEM_SECTIONS,
    /**< Number of Rams ECC is enabled  */
    .pMemSubTypeList = &(ECC_Test_MCUMCAN1subMemTypeList1[0]),
    /**< Sub type list  */
};

Can you tell me how can i map this flipBitMask or we can give randomly some value with the ram size for MSRAM.(256KiB). currently i am giving 0x101

Regards,
Debashis

0 Debashis Mahanty 2 months ago in reply to Debashis Mahanty

Intellectual 486 points

Hi Nihar,

Debashis Mahanty said:
Can you tell me how can i map this flipBitMask or we can give randomly some value with the ram size for MSRAM.(256KiB). currently i am giving 0x101

I understand that how this flipBit working, its flip the particular bit as we gave the hex value but i don't know why the ESM module is not triggered.

Regards,
Debashis

+1 Nihar Potturu 2 months ago in reply to Debashis Mahanty

TI__Genius 13606 points

Hello Debashis,

Can you try updating the ESM configuration and application code attached below and check if you see ESM interrupt getting triggered.

#if defined(SOC_AM62AX) || defined (SOC_AM62PX)
SDL_ESM_config ECC_Test_esmInitConfig_MAIN =
{
    .esmErrorConfig = {1u, 8u}, /* Self test error config */
    .enableBitmap = {0x00000006u, 0x00000000u, 0x0000000eu, 0x00003000u,
					 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
					},
     /**< All events enable: except timer and self test  events, and Main ESM output */
    /* Temporarily disabling vim compare error as well*/
    .priorityBitmap = {0x00000006u, 0x00000000u, 0x0000000eu, 0x00003000u,
					   0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        },
    /**< All events high priority: except timer, selftest error events, and Main ESM output */
    .errorpinBitmap = {0x00000006u, 0x00000000u, 0x0000000eu, 0x00003000u,
					   0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                      },
    /**< All events high priority: except timer, selftest error events, and Main ESM output */
};

SDL_ESM_config ECC_Test_esmInitConfig_MCU =
{
    .esmErrorConfig = {0u, 3u}, /* Self test error config */
    .enableBitmap = {0x000c0000u, 0x0000000fu, 0x00000000u, 0x00000000u,
                    0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                    0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                    0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                    0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                    0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                    0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                    0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                    },
     /**< All events enable: except clkstop events for unused clocks
      *   and PCIE events */
    .priorityBitmap = { 0x000c0000u, 0x0000000fu, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        },
    /**< All events high priority: except clkstop events for unused clocks
     *   and PCIE events */
    .errorpinBitmap = { 0x000c0000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                        0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                      },
    /**< All events high priority: except clkstop for unused clocks
     *   and PCIE events */
};
#endif

int32_t runECC2BitMCUMCAN1_InjectTest(void)
{
    SDL_ErrType_t result;
    int32_t retVal=0;

    SDL_ECC_InjectErrorConfig_t injectErrorConfig;
	volatile uint32_t testLocationValue;
	memset(&injectErrorConfig, 0, sizeof(injectErrorConfig));

    DebugP_log("\r\nMCU MCAN1 Double bit error inject Example test UC-1: starting\r\n");

    /* Run one shot test for MCU MCAN1 2 bit error */
    /* Note the address is relative to start of ram */
    injectErrorConfig.pErrMem = (uint32_t *)(0x79100000u);

    injectErrorConfig.flipBitMask = 0x101;

    result = SDL_ECC_injectError(SDL_MCU_MSRAM_256K0_MSRAM32KX64E_ECC_AGGR,
                                 SDL_MCU_MSRAM_256K0_MSRAM32KX64E_ECC_AGGR_MSRAM32KX64E_MSRAM0_ECC0_RAM_ID,
                                 SDL_INJECT_ECC_ERROR_FORCING_1BIT_ONCE,
                                 &injectErrorConfig);

    if (result != SDL_APP_TEST_PASS ) {
        DebugP_log("\r\nMCU MCAN1 Double bit error inject test: pError address 0x%p: test failed\r\n",
                   injectErrorConfig.pErrMem);
        retVal = SDL_APP_TEST_FAILED;
    } else {

        /* Access the memory where injection is expected */
        testLocationValue = injectErrorConfig.pErrMem[0];
        DebugP_log("\r\nMCU MCAN1 Double bit error inject test: pError address 0x%p test complete and the value is 0x%p\r\n",
                   injectErrorConfig.pErrMem, testLocationValue);
    }

    return retVal;
}/* End of runECC2BitMCUMCAN1_InjectTest() */

I think you may have not enabled the relevant ESM interrupts in the ESM configuration

Regards,

Nihar Potturu.

0 Debashis Mahanty 2 months ago in reply to Nihar Potturu

Intellectual 486 points

Hi Nihar,
Thanks for your reply. And its working now, I have few questions in my mind

1. If my further application if I want to merge ECC and some other modules of SDL. So can you tell me how can i configure ESM for all the modules. Should i have to do ESM_init for all the modules or ?

2. Can you tell me how can i map this interrupts with this esm configuration.

3. If my understanding is correct, As per the TRM documentation(12.8.4.3.6 Inject only mode) . when we initialize the ecc module, the correction and detection will not perform. Its only for diagnostic purpose. So if we didn't initialize the ECC can you catch the error in run time with the help of ESM callback if any bit is flipped.
Because when we try here with out ecc_init the inject function doesn't come with success.

Regards,
Debashis

0 Debashis Mahanty 1 month ago in reply to Debashis Mahanty

Intellectual 486 points

Hi Nihar,
Waiting For your reply ?

Regards,
Debashis

0 Nihar Potturu 1 month ago in reply to Debashis Mahanty

TI__Genius 13606 points

Hello Debashis,

Apologies for the delay here.

You can refer the below FAQ on ESM to get more details on configuring ESM for different events

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1265594/faq-am64x-am62x-am62ax-configuring-the-esm-module-from-sdl-and-setting-the-esm-bit-fields-to-enable-the-esm-error-events

Debashis Mahanty said:
If my understanding is correct, As per the TRM documentation(12.8.4.3.6 Inject only mode) . when we initialize the ecc module, the correction and detection will not perform. Its only for diagnostic purpose.

That is only for inject only memories such as internal memories of cores (TCMs, Caches etc). For memories such as MSRAM, both injection and error detection/correction is done by the ECC aggregator. Hence, it is necessary to initialize the ECC aggr,

Regards,

Nihar Potturu.

0 Debashis Mahanty 1 month ago in reply to Nihar Potturu

Intellectual 486 points

Hi Nihar,

Thanks For your reply. I understand the ESM mapping.

But I have queries related to the callback of ESM for example if I want a different callback for ECC and DCC then how can I achieve this?

Regards,
Debashis

0 Nihar Potturu 1 month ago in reply to Debashis Mahanty

TI__Genius 13606 points

Hello Debashis,

Debashis Mahanty said:
But I have queries related to the callback of ESM for example if I want a different callback for ECC and DCC then how can I achieve this?

It is not possible to have different callback for different error events. The callback would be common, You can take different actions in the same back callback function based on the error source.

Regards,

Nihar Potturu.

0 Debashis Mahanty 1 month ago in reply to Nihar Potturu

Intellectual 486 points

Hi Nihar,
Can you please let me know?
How can we know from which module the error was triggered and how to take the necessary action?

Regards,
Debashis

0 Nihar Potturu 1 month ago in reply to Debashis Mahanty

TI__Genius 13606 points

Hello Debashis,

Debashis Mahanty said:
How can we know from which module the error was triggered and how to take the necessary action?

I will explain this using the POK example provided in the SDL for your understanding.

If you run the Pok example and put a break point in the call back function, you will see the following variables:

You can see the value of grpchannel is 2 and index is 12. As mentioned earlier ESM error events are divided into groups of 32. So events 0-31 would be in group 0, 32-63 in group 1 and so on. So, group 2 indicates that the event ID is in 64-95 range. And here, since the index is 12 the event ID would be 64+12=76. You can see the interrupt src is also 76 in the screenshot attached. You can check event number 76 in wkup esm events list mentioned in TRM and you will see that it is a Pok related event.

Hope this helps.

Regards,

Nihar Potturu.

0 Debashis Mahanty 1 month ago in reply to Nihar Potturu

Intellectual 486 points

Hi Nihar,
Thank you very much for your support. Now I understand the mapping for ESM to Know the error type. I will map respectively.

Regards,
Debashis

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ECC Address For MSRAM Related query