Other Parts Discussed in Thread: TDA4VH
Tool/software:
I am trying to synchronize with A72 cluster0 core0 using ARM sev/wfe instructions and the following steps.
1. A72 cluster0 core1 : wfe instruction execution, waiting for A72 cluster0 core0
2. A72 cluster0 core2 : wfe instruction execution, waiting for A72 cluster0 core0
3. A72 cluster0 core3 : wfe instruction execution, waiting for A72 cluster0 core0
4. A72 cluster1 core0 : wfe instruction execution, waiting for A72 cluster0 core0
5. A72 cluster1 core1 : wfe instruction execution, waiting for A72 cluster0 core0
6. A72 cluster1 core2 : wfe instruction execution, waiting for A72 cluster0 core0
7. A72 cluster1 core3 : wfe instruction execution, waiting for A72 cluster0 core0
8. A72 cluster0 core0 : sev instruction execution
9. all cores wake-up
However, even if a sev instruction is issued from a core belonging to cluster0, only the wfe of the core belonging to cluster0 is released.
The core belonging to cluster1 remains in the wfe state.
It appears that sev is not issued across clusters.
I believe all cores will be notified because the “ARM® Cortex®-A72 MPCore Processor Technical Reference Manual” contains the following statement.
Is there a setting required for inter-cluster communication in the SoC?
