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TDA4VH-Q1: How do I enable the BIST function using SDL9.1?

Part Number: TDA4VH-Q1

Tool/software:

void bist_TaskFxn(void)
{
    int32_t testResult = 0;
    int32_t     i, j;
    int32_t    *pbist_array;
    int32_t    *lbist_array;
    /* Bitmap representing status of each PBIST test in each boot stage */
    int32_t     pbist_stage_status[NUM_BOOT_STAGES];
    /* Bitmap representing status of each negative PBIST test in each boot stage */
    int32_t     pbist_stage_neg_status[NUM_BOOT_STAGES];
        /* Bitmap representing status of each PBIST check of ROM in each boot stage */
    #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
    int32_t     pbist_stage_rom_test_status[NUM_BOOT_STAGES];
    #endif
    /* Bitmap representing status of each LBIST test in each boot stage */
    int32_t     lbist_stage_status[NUM_BOOT_STAGES];

    /* Initialize boot stage status bitmaps to "not run/fail" */
    for (i = 0; i < NUM_BOOT_STAGES; i++)
    {
        pbist_stage_status[i] = 0x0;
        pbist_stage_neg_status[i] = 0x0;
        lbist_stage_status[i] = 0x0;
        #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
        pbist_stage_rom_test_status[i]=0x0;
        #endif
    }

    testResult = PBIST_commonInit();

    if (testResult != 0)
    {
        UART_printf("PBIST_commonInit ...FAILED \n");
    }
    else
    {
        /* This example presents a scenario in which the BISTs are performed in stages
         * with booting of specific cores performed after certain stages. This example
	 * is adapted from the MCUSW Boot App for J721E. No cores are actually loaded
	 * in this example. Only the flow of performing BIST in stages is shown. */
        /* Run pre-boot-stage PBIST's.  The definitions of the pre-boot-stage PBIST's
         * are found in soc/<SOC Device>/bist_core_defs.c.*/
	for (i = 0; i < num_pbists_pre_boot; i++)
        {
            #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
            /* Run test on selected instance */
            testResult = PBIST_runTest(pbist_pre_boot_stage[i], (uint8_t)PBIST_TEST_NEGATIVE);
            /* Convert signed return value (with -1 = failure and 0 = pass) to become
             * 0 = failure and 1 = pass */
            pbist_pre_boot_stage_neg_status[i] = testResult + 1;
            if ( testResult != 0)
            {
                UART_printf("PBIST negative test failed for %d\n",
                                pbist_pre_boot_stage[i]);
                break;
            }
            #else
            /* Run test on selected instance */
            testResult = PBIST_runTest(pbist_pre_boot_stage[i], (uint8_t)1);
            /* Convert signed return value (with -1 = failure and 0 = pass) to become
             * 0 = failure and 1 = pass */
            pbist_pre_boot_stage_neg_status[i] = testResult + 1;
            if ( testResult != 0)
            {
                UART_printf("PBIST negative test failed for %d\n",
                                pbist_pre_boot_stage[i]);
                break;
            }
            #endif

        }

        for (i = 0; i < num_pbists_pre_boot; i++)
        {
            #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
            /* Run test on selected instance */
            testResult = PBIST_runTest(pbist_pre_boot_stage[i],(uint8_t)PBIST_TEST_POSITIVE);
            /* Convert signed return value (with -1 = failure and 0 = pass) to become
             * 0 = failure and 1 = pass */
            pbist_pre_boot_stage_status[i] = testResult + 1;
            if ( testResult != 0)
            {
                UART_printf("PBIST functional test failed for %d\n",
                                pbist_pre_boot_stage[i]);
                break;
            }
            #else
            /* Run test on selected instance */
            testResult = PBIST_runTest(pbist_pre_boot_stage[i], (uint8_t)0);
            /* Convert signed return value (with -1 = failure and 0 = pass) to become
             * 0 = failure and 1 = pass */
            pbist_pre_boot_stage_status[i] = testResult + 1;
            if ( testResult != 0)
            {
                UART_printf("PBIST functional test failed for %d\n",
                                pbist_pre_boot_stage[i]);
                break;
            }
            #endif
        }
        #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
        for (i = 0; i < num_pbists_pre_boot; i++)
        {
            /* Run test on selected instance */
            testResult = PBIST_runTest(pbist_pre_boot_stage[i], (uint8_t)PBIST_TEST_ROM);
            /* Convert signed return value (with -1 = failure and 0 = pass) to become
             * 0 = failure and 1 = pass */
            pbist_pre_boot_stage_rom_test_status[i] = testResult + 1;
            if ( testResult != 0)
            {
                UART_printf("PBIST ROM test failed for %d\n",
                                pbist_pre_boot_stage[i]);
            }
        }
        #endif

        /* Run pre-boot-stage LBIST's. The definitions of the pre-boot-stage LBIST's
         * are found in soc/<SOC Device>/bist_core_defs.c. */
        for (i = 0; i < num_lbists_pre_boot; i++)
        {
            /* Run test on selected instance */
            testResult = LBIST_runTest(lbist_pre_boot_stage[i]);
            lbist_pre_boot_stage_status[i] = testResult;
            if ((testResult == -1) ||
                (testResult == LBIST_POST_COMPLETED_FAILURE) ||
                (testResult == LBIST_POST_ATTEMPTED_TIMEOUT))
            {
                UART_printf("LBIST functional test failed for %d\n",
                                lbist_pre_boot_stage[i]);
                break;
            }
        }

        /* After running PBIST potentially on MSMC, re-initialize the CLEC */
        testResult = PBIST_commonInit();

        if (testResult != 0)
        {
            UART_printf("PBIST_commonInit after pre-boot stage ...FAILED \n");
        }

        /* Run LBIST and PBIST before each boot stage.  The definitions of the LBIST
         * and PBIST sections for each stage are defined in
         * soc/<SOC Device>/bist_core_defs.c. */
        for (j = 0; j < NUM_BOOT_STAGES; j++)
        {
            pbist_array = pbist_array_stage[j];
            lbist_array = lbist_array_stage[j];
            for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
            {
                PBIST_clecConfig(pbist_array[i]);

                #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
                /* Run test on selected instance */
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */
				#if defined (SOC_J784S4)
				if((i==27)|| (i==28)||(i==29))
				{
					continue;
				}
                #endif		
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */				
                #if defined (SOC_J7200)
                if((i== 6U)|| (i==7U)||(i==8U))
                {
                    continue;
                }
                #endif
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */					
                #if defined (SOC_J721S2)
                if((i==14)|| (i==15)||(i==16))
                {
                    continue;
                }
                #endif
                testResult = PBIST_runTest(pbist_array[i], (uint8_t)PBIST_TEST_NEGATIVE);

                /* Convert signed return value (with -1 = failure and 0 = pass) to become
                 * a single bit as part of bitfield with 0 = failure and 1 = pass */
                pbist_stage_neg_status[j] |= ((uint32_t)(testResult + 1) << i);
                if ( testResult != 0)
                {
                    UART_printf("PBIST negative test failed for %d\n",
                                    pbist_array[i]);
                    break;
                }
                #else
                /* Run test on selected instance */
                testResult = PBIST_runTest(pbist_array[i], (uint8_t)1);

                /* Convert signed return value (with -1 = failure and 0 = pass) to become
                 * a single bit as part of bitfield with 0 = failure and 1 = pass */
                pbist_stage_neg_status[j] |= ((uint32_t)(testResult + 1) << i);
                if ( testResult != 0)
                {
                    UART_printf("PBIST negative test failed for %d\n",
                                    pbist_array[i]);
                    break;
                }
                #endif
            }

            for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
            {
                #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
                /* Run test on selected instance */	
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */	
				#if defined (SOC_J784S4)
				if((i==27)|| (i==28)||(i==29))
				{
					continue;
				}
                #endif	
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */					
                #if defined (SOC_J7200)
                if((i== 6U)|| (i==7U)||(i==8U))
                {
                    continue;
                }
                #endif	
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */					
                #if defined (SOC_J721S2)
                if((i==14)|| (i==15)||(i==16))
                {
                    continue;
                }
                #endif
                testResult = PBIST_runTest(pbist_array[i], (uint8_t)PBIST_TEST_POSITIVE);

                /* Convert signed return value (with -1 = failure and 0 = pass) to become
                 * a single bit as part of bitfield with 0 = failure and 1 = pass */
                pbist_stage_status[j] |= ((uint32_t)(testResult + 1) << i);
                if ( testResult != 0)
                {
                    UART_printf("PBIST functional test failed for %d\n",
                                    pbist_array[i]);
                    break;
                }
                #else
                testResult = PBIST_runTest(pbist_array[i], (uint8_t)0);

                /* Convert signed return value (with -1 = failure and 0 = pass) to become
                 * a single bit as part of bitfield with 0 = failure and 1 = pass */
                pbist_stage_status[j] |= ((uint32_t)(testResult + 1) << i);
                if ( testResult != 0)
                {
                    UART_printf("PBIST functional test failed for %d\n",
                                    pbist_array[i]);
                    break;
                }
                #endif
            }
            #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
            for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
            {
                /* Run test on selected instance */
                testResult = PBIST_runTest(pbist_array[i], (uint8_t)PBIST_TEST_ROM);

                /* Convert signed return value (with -1 = failure and 0 = pass) to become
                 * a single bit as part of bitfield with 0 = failure and 1 = pass */
                pbist_stage_rom_test_status[j] |= ((uint32_t)(testResult + 1) << i);
                if ( testResult != 0)
                {
                    UART_printf("PBIST ROM  test failed for %d\n",
                                    pbist_array[i]);
                }
            }
            #endif
#if defined(DEBUG)
            UART_printf( "Ran PBIST for Stage %d\n", j);
#endif
            for (i = 0; i < num_lbists_per_boot_stage[j]; i++)
            {
                testResult = LBIST_runTest(lbist_array[i]);

                /* Convert signed return value (with -1 = failure and 0 = pass) to become
                 * a single bit as part of bitfield with 0 = failure and 1 = pass */
                lbist_stage_status[j] |= ((uint32_t)(testResult + 1) << i);
                if (testResult != 0)
                {
                    UART_printf("LBIST functional test failed for %d\n",
                                    lbist_array[i]);
                    break;
                }
            }
#if defined(DEBUG)
            UART_printf( "Ran LBIST for Stage %d\n", j);
#endif
            /* Signal Boot Task that BIST for the stage is completed */
            UART_printf("\n *** Boot stage %d is complete, cores for this stage may now be loaded ***\n\n", j);
        }
    }

    if (testResult == 0)
    {
        UART_printf("==========================\n");
        UART_printf("BIST: Example App Summary:\n");
        UART_printf("==========================\n");
        for (i = 0; i < num_pbists_pre_boot; i++)
        {
            UART_printf("BIST: Pre-boot Stage - Ran negative PBIST ID - %s, Result = %s\n",
                            pbistName(pbist_pre_boot_stage[i]),
                            testStatusPrint(pbist_pre_boot_stage_neg_status[i]));
        }
        UART_printf("Pre-boot stage - Ran %d negative PBIST total sections\n",
                        num_pbists_pre_boot);

        #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
        for (i = 0; i < num_pbists_pre_boot; i++)
        {
            UART_printf("BIST: Pre-boot Stage - Ran ROM Test PBIST ID - %s, Result = %s\n",
                            pbistName(pbist_pre_boot_stage[i]),
                            testStatusPrint(pbist_pre_boot_stage_rom_test_status[i]));
        }
        UART_printf("Pre-boot stage - Ran %d ROM Test of  PBIST total sections\n",
                        num_pbists_pre_boot);
        #endif
        for (i = 0; i < num_pbists_pre_boot; i++)
        {
            UART_printf("BIST: Pre-boot Stage - Ran PBIST ID - %s, Result = %s\n",
                            pbistName(pbist_pre_boot_stage[i]),
                            testStatusPrint(pbist_pre_boot_stage_status[i]));
        }
        UART_printf("Pre-boot stage - Ran %d PBIST total sections\n",
                        num_pbists_pre_boot);
        for (i = 0; i < num_lbists_pre_boot; i++)
        {
            UART_printf("BIST: Pre-boot Stage - Ran LBIST ID - %s, Result = %s\n",
                            lbistName(lbist_pre_boot_stage[i]),
                            LBIST_hwPostStatusPrint(lbist_pre_boot_stage_status[i]));
        }
        UART_printf("Pre-boot stage - Ran %d LBIST total sections\n",
                        num_lbists_pre_boot);

        for (j = 0; j < NUM_BOOT_STAGES; j++)
        {
            pbist_array = pbist_array_stage[j];
            lbist_array = lbist_array_stage[j];
#if defined(GATHER_BIST_STAGE_DETAILS)
            for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
            {
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */
				#if defined (SOC_J784S4)
				if((i==27)|| (i==28)||(i==29))
				{
					continue;
				}
                #endif	
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */					
                #if defined (SOC_J7200)
                if((i== 6U)|| (i==7U)||(i==8U))
                {
                    continue;
                }
                #endif
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */					
                #if defined (SOC_J721S2)
                if((i==14)|| (i==15)||(i==16))
                {
                    continue;
                }
                #endif					
                UART_printf("BIST: Stage %d - Ran negative PBIST ID - %s, Result = %s\n",
                                j, pbistName(pbist_array[i]),
                                testStatusPrint((pbist_stage_neg_status[j] >> i) & 0x1));
            }
            UART_printf("BIST: Stage %d - Ran %d negative PBIST total sections\n",
                            j, (uint32_t)num_pbists_per_boot_stage[j]);

            #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
            for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
            {
                UART_printf("BIST: Stage %d - Ran ROM Test PBIST ID - %s, Result = %s\n",
                                j, pbistName(pbist_array[i]),
                                testStatusPrint((pbist_stage_rom_test_status[j] >> i) & 0x1));
            }
            UART_printf("BIST: Stage %d - Ran %d ROM Test PBIST total sections\n",
                            j, (uint32_t)num_pbists_per_boot_stage[j]);

            #endif
            for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
            {
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */
				#if defined (SOC_J784S4)
				if((i==27)|| (i==28)||(i==29))
				{
					continue;
				}
                #endif	
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */					
                #if defined (SOC_J7200)
                if((i== 6U)|| (i==7U)||(i==8U))
                {
                    continue;
                }
                #endif	
                /*MCU instances are not supported for neg and pos test, 
                So skipped according to the pbist_first_boot_stage array sequence */					
                #if defined (SOC_J721S2)
                if((i==14)|| (i==15)||(i==16))
                {
                    continue;
                }
                #endif				
                UART_printf("BIST: Stage %d - Ran PBIST ID - %s, Result = %s\n",
                                j, pbistName(pbist_array[i]),
                                testStatusPrint((pbist_stage_status[j] >> i) & 0x1));
            }
            UART_printf("BIST: Stage %d - Ran %d PBIST total sections\n",
                            j, (uint32_t)num_pbists_per_boot_stage[j]);

            for (i = 0; i < num_lbists_per_boot_stage[j]; i++)
            {
                UART_printf("BIST: Stage %d - Ran LBIST ID - %s, Result = %s\n",
                                j, lbistName(lbist_array[i]),
                                testStatusPrint((lbist_stage_status[j] >> i) & 0x1));
            }
            UART_printf("BIST: Stage %d - Ran %d LBIST sections\n",
                            j, (uint32_t)num_lbists_per_boot_stage[j]);
#endif
        }
    }
}

Hi,

Refer to the inserted SDL9.1 BIST code for the following questions

1、Can I enable PBIST and LBIST by calling the Bistbist_TaskFxn interface in the BIST folder in the examples directory in the SDL9.1 library? Can this case be applied to production software?

2、If this BIST example is available, at what stage should I call this code?

3、If this BIST case is available, can you tell me how long the BIST function takes to execute?

  • Hi,

    1、Can I enable PBIST and LBIST by calling the Bistbist_TaskFxn interface in the BIST folder in the examples directory in the SDL9.1 library? Can this case be applied to production software?

    Please refer to the following userguides to understand and build the standalone BIST example on SDL -

    2、If this BIST example is available, at what stage should I call this code?
    • BIST is expected to be run at boot-time or once per drive cycle.

    • BIST must be run from a different core than is being tested. This is because the test is destructive in nature. For this reason also, after BIST test it is necessary to reset the module.

    • BIST is executed by hardware for MCU automatically at boot up as part of HW POST

    3、If this BIST case is available, can you tell me how long the BIST function takes to execute?

    The following the timing logs obtained during TI's validation.

    PBIST Timing Logs

    SDL_PBIST_getPOSTStatus 4
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAINR5F0, SDL_PBIST_NEG_TEST) 22
    SDL_PBIST_selfTest(SDL_PBIST_INST_CODEC_1, SDL_PBIST_NEG_TEST)  17
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAININFRA1, SDL_PBIST_NEG_TEST) 27
    SDL_PBIST_selfTest(SDL_PBIST_INST_VPAC_0, SDL_PBIST_NEG_TEST) 17
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAINR5F1, SDL_PBIST_NEG_TEST) 20
    SDL_PBIST_selfTest(SDL_PBIST_INST_DSS, SDL_PBIST_NEG_TEST) 17
    SDL_PBIST_selfTest(SDL_PBIST_INST_DMPAC, SDL_PBIST_NEG_TEST) 18
    SDL_PBIST_selfTest(SDL_PBIST_INST_NAVSS, SDL_PBIST_NEG_TEST) 23
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAININFRA0, SDL_PBIST_NEG_TEST) 23
    SDL_PBIST_selfTest(SDL_PBIST_INST_GPU, SDL_PBIST_NEG_TEST) 16
    SDL_PBIST_selfTest(SDL_PBIST_INST_HC, SDL_PBIST_NEG_TEST) 26
    SDL_PBIST_selfTest(SDL_PBIST_INST_VPAC_1, SDL_PBIST_NEG_TEST) 18
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAINR5F2, SDL_PBIST_NEG_TEST) 20
    SDL_PBIST_selfTest(SDL_PBIST_INST_CODEC_1, SDL_PBIST_NEG_TEST) 17
    SDL_PBIST_selfTest(SDL_PBIST_INST_A72_0_0, SDL_PBIST_NEG_TEST) 27
    SDL_PBIST_selfTest(SDL_PBIST_INST_A72_0_1, SDL_PBIST_NEG_TEST) 27
    SDL_PBIST_selfTest(SDL_PBIST_INST_A72_1_0, SDL_PBIST_NEG_TEST) 27
    SDL_PBIST_selfTest(SDL_PBIST_INST_A72_1_1, SDL_PBIST_NEG_TEST) 27
    SDL_PBIST_selfTest(SDL_PBIST_INST_C7X_0, SDL_PBIST_NEG_TEST) 27
    SDL_PBIST_selfTest(SDL_PBIST_INST_C7X_1, SDL_PBIST_NEG_TEST) 28
    SDL_PBIST_selfTest(SDL_PBIST_INST_C7X_2, SDL_PBIST_NEG_TEST) 27
    SDL_PBIST_selfTest(SDL_PBIST_INST_C7X_3, SDL_PBIST_NEG_TEST) 28
    SDL_PBIST_selfTest(SDL_PBIST_INST_ANA_0, SDL_PBIST_NEG_TEST) 28
    SDL_PBIST_selfTest(SDL_PBIST_INST_ANA_1, SDL_PBIST_NEG_TEST) 29
    SDL_PBIST_selfTest(SDL_PBIST_INST_ANA_2, SDL_PBIST_NEG_TEST) 29
    SDL_PBIST_selfTest(SDL_PBIST_INST_ANA_3, SDL_PBIST_NEG_TEST) 29
    SDL_PBIST_selfTest(SDL_PBIST_INST_MSMC, SDL_PBIST_NEG_TEST) 26
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAINR5F0, SDL_PBIST_TEST) 2279
    SDL_PBIST_selfTest(SDL_PBIST_INST_CODEC_1, SDL_PBIST_TEST) 2199
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAININFRA1, SDL_PBIST_TEST) 21653
    SDL_PBIST_selfTest(SDL_PBIST_INST_VPAC_0, SDL_PBIST_TEST) 4364
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAINR5F1, SDL_PBIST_TEST) 2279
    SDL_PBIST_selfTest(SDL_PBIST_INST_DSS, SDL_PBIST_TEST) 9668
    SDL_PBIST_selfTest(SDL_PBIST_INST_DMPAC, SDL_PBIST_TEST) 2947
    SDL_PBIST_selfTest(SDL_PBIST_INST_NAVSS, SDL_PBIST_TEST) 5152
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAININFRA0, SDL_PBIST_TEST) 11524
    SDL_PBIST_selfTest(SDL_PBIST_INST_GPU, SDL_PBIST_TEST) 2373
    SDL_PBIST_selfTest(SDL_PBIST_INST_HC, SDL_PBIST_TEST) 4080
    SDL_PBIST_selfTest(SDL_PBIST_INST_VPAC_1, SDL_PBIST_TEST) 4364
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAINR5F2, SDL_PBIST_TEST) 2280
    SDL_PBIST_selfTest(SDL_PBIST_INST_CODEC_1, SDL_PBIST_TEST) 2200
    SDL_PBIST_selfTest(SDL_PBIST_INST_A72_0_0, SDL_PBIST_TEST) 1791
    SDL_PBIST_selfTest(SDL_PBIST_INST_A72_0_1, SDL_PBIST_TEST) 7524
    SDL_PBIST_selfTest(SDL_PBIST_INST_A72_1_0, SDL_PBIST_TEST) 1790
    SDL_PBIST_selfTest(SDL_PBIST_INST_A72_1_1, SDL_PBIST_TEST) 7524
    SDL_PBIST_selfTest(SDL_PBIST_INST_C7X_0, SDL_PBIST_TEST) 579
    SDL_PBIST_selfTest(SDL_PBIST_INST_C7X_1, SDL_PBIST_TEST) 579
    SDL_PBIST_selfTest(SDL_PBIST_INST_C7X_2, SDL_PBIST_TEST) 578
    SDL_PBIST_selfTest(SDL_PBIST_INST_C7X_3, SDL_PBIST_TEST) 579
    SDL_PBIST_selfTest(SDL_PBIST_INST_ANA_0, SDL_PBIST_TEST) 6766
    SDL_PBIST_selfTest(SDL_PBIST_INST_ANA_1, SDL_PBIST_TEST) 6766
    SDL_PBIST_selfTest(SDL_PBIST_INST_ANA_2, SDL_PBIST_TEST) 6765
    SDL_PBIST_selfTest(SDL_PBIST_INST_ANA_3, SDL_PBIST_TEST) 6766
    SDL_PBIST_selfTest(SDL_PBIST_INST_MSMC, SDL_PBIST_TEST) 18970
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAINR5F0, SDL_PBIST_TEST_OF_ROM) 279
    SDL_PBIST_selfTest(SDL_PBIST_INST_CODEC, SDL_PBIST_TEST_OF_ROM) 276
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAININFRA1, SDL_PBIST_TEST_OF_ROM) 282
    SDL_PBIST_selfTest(SDL_PBIST_INST_VPAC_0, SDL_PBIST_TEST_OF_ROM) 145
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAINR5F1, SDL_PBIST_TEST_OF_ROM) 278
    SDL_PBIST_selfTest(SDL_PBIST_INST_DSS, SDL_PBIST_TEST_OF_ROM) 276
    SDL_PBIST_selfTest(SDL_PBIST_INST_DMPAC, SDL_PBIST_TEST_OF_ROM) 276
    SDL_PBIST_selfTest(SDL_PBIST_INST_NAVSS, SDL_PBIST_TEST_OF_ROM) 280
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAININFRA0, SDL_PBIST_TEST_OF_ROM) 280
    SDL_PBIST_selfTest(SDL_PBIST_INST_GPU, SDL_PBIST_TEST_OF_ROM) 276
    SDL_PBIST_selfTest(SDL_PBIST_INST_HC, SDL_PBIST_TEST_OF_ROM) 282
    SDL_PBIST_selfTest(SDL_PBIST_INST_VPAC_1, SDL_PBIST_TEST_OF_ROM) 144
    SDL_PBIST_selfTest(SDL_PBIST_INST_MAINR5F2, SDL_PBIST_TEST_OF_ROM) 279
    SDL_PBIST_selfTest(SDL_PBIST_INST_CODEC_1, SDL_PBIST_TEST_OF_ROM) 275
    SDL_PBIST_selfTest(PBIST_INSTANCE_MSMC, SDL_PBIST_TEST_OF_ROM) 61
    SDL_PBIST_selfTest(SDL_PBIST_INST_MCUR5F1, SDL_PBIST_TEST_OF_ROM) 398
    SDL_PBIST_selfTest(SDL_PBIST_INST_MCU_PULSAR, SDL_PBIST_TEST_OF_ROM) 399

    LBIST Timing Logs

    SDL_LBIST_getPOSTStatus

    5

    SDL_LBIST_selfTest (SDL_LBIST_INST_MAINR5F0) 17442
    SDL_LBIST_selfTest (SDL_LBIST_INST_MAINR5F1) 17373
    SDL_LBIST_selfTest (SDL_LBIST_INST_C7X0) 18842
    SDL_LBIST_selfTest (SDL_LBIST_INST_C7X1) 18843
    SDL_LBIST_selfTest (SDL_LBIST_INST_VPAC0) 18842
    SDL_LBIST_selfTest (SDL_LBIST_INST_DMPAC) 7266
    SDL_LBIST_selfTest (SDL_LBIST_INST_A72) 18840
    SDL_LBIST_selfTest (SDL_LBIST_INST_VPAC1) 18842
    SDL_LBIST_selfTest (SDL_LBIST_INST_A72_1) 18841
    SDL_LBIST_selfTest (SDL_LBIST_INST_C7X2) 18842
    SDL_LBIST_selfTest (SDL_LBIST_INST_C7X3) 18841
    SDL_LBIST_selfTest (SDL_LBIST_INST_A72SS0_CORE0) 15615
    SDL_LBIST_selfTest (SDL_LBIST_INST_A72SS0_CORE1) 15611
    SDL_LBIST_selfTest (SDL_LBIST_INST_A72SS0_CORE2) 15612
    SDL_LBIST_selfTest (SDL_LBIST_INST_A72SS0_CORE3) 15612
    SDL_LBIST_selfTest (SDL_LBIST_INST_A72SS1_CORE0) 15612
    SDL_LBIST_selfTest (SDL_LBIST_INST_A72SS1_CORE1) 15611
    SDL_LBIST_selfTest (SDL_LBIST_INST_A72SS1_CORE2) 15612
    SDL_LBIST_selfTest (SDL_LBIST_INST_A72SS1_CORE3) 15611
    SDL_LBIST_selfTest (SDL_LBIST_INST_MAINR5F2) 17367

    Regards,

    Josiitaa

  • What is the unit of time?

  • Microseconds (us).

    Regards,

    Josiitaa

  • Hi,

    After the MCU domain is started, can I put bist_TaskFxn in the idle task and keep it executing?

    void bist_TaskFxn(void)
    {
        int32_t testResult = 0;
        int32_t     i, j;
        int32_t    *pbist_array;
        int32_t    *lbist_array;
        /* Bitmap representing status of each PBIST test in each boot stage */
        int32_t     pbist_stage_status[NUM_BOOT_STAGES];
        /* Bitmap representing status of each negative PBIST test in each boot stage */
        int32_t     pbist_stage_neg_status[NUM_BOOT_STAGES];
            /* Bitmap representing status of each PBIST check of ROM in each boot stage */
        #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
        int32_t     pbist_stage_rom_test_status[NUM_BOOT_STAGES];
        #endif
        /* Bitmap representing status of each LBIST test in each boot stage */
        int32_t     lbist_stage_status[NUM_BOOT_STAGES];
    
        /* Initialize boot stage status bitmaps to "not run/fail" */
        for (i = 0; i < NUM_BOOT_STAGES; i++)
        {
            pbist_stage_status[i] = 0x0;
            pbist_stage_neg_status[i] = 0x0;
            lbist_stage_status[i] = 0x0;
            #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
            pbist_stage_rom_test_status[i]=0x0;
            #endif
        }
    
        testResult = PBIST_commonInit();
    
        if (testResult != 0)
        {
            UART_printf("PBIST_commonInit ...FAILED \n");
        }
        else
        {
            /* This example presents a scenario in which the BISTs are performed in stages
             * with booting of specific cores performed after certain stages. This example
    	 * is adapted from the MCUSW Boot App for J721E. No cores are actually loaded
    	 * in this example. Only the flow of performing BIST in stages is shown. */
            /* Run pre-boot-stage PBIST's.  The definitions of the pre-boot-stage PBIST's
             * are found in soc/<SOC Device>/bist_core_defs.c.*/
    	for (i = 0; i < num_pbists_pre_boot; i++)
            {
                #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
                /* Run test on selected instance */
                testResult = PBIST_runTest(pbist_pre_boot_stage[i], (uint8_t)PBIST_TEST_NEGATIVE);
                /* Convert signed return value (with -1 = failure and 0 = pass) to become
                 * 0 = failure and 1 = pass */
                pbist_pre_boot_stage_neg_status[i] = testResult + 1;
                if ( testResult != 0)
                {
                    UART_printf("PBIST negative test failed for %d\n",
                                    pbist_pre_boot_stage[i]);
                    break;
                }
                #else
                /* Run test on selected instance */
                testResult = PBIST_runTest(pbist_pre_boot_stage[i], (uint8_t)1);
                /* Convert signed return value (with -1 = failure and 0 = pass) to become
                 * 0 = failure and 1 = pass */
                pbist_pre_boot_stage_neg_status[i] = testResult + 1;
                if ( testResult != 0)
                {
                    UART_printf("PBIST negative test failed for %d\n",
                                    pbist_pre_boot_stage[i]);
                    break;
                }
                #endif
    
            }
    
            for (i = 0; i < num_pbists_pre_boot; i++)
            {
                #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
                /* Run test on selected instance */
                testResult = PBIST_runTest(pbist_pre_boot_stage[i],(uint8_t)PBIST_TEST_POSITIVE);
                /* Convert signed return value (with -1 = failure and 0 = pass) to become
                 * 0 = failure and 1 = pass */
                pbist_pre_boot_stage_status[i] = testResult + 1;
                if ( testResult != 0)
                {
                    UART_printf("PBIST functional test failed for %d\n",
                                    pbist_pre_boot_stage[i]);
                    break;
                }
                #else
                /* Run test on selected instance */
                testResult = PBIST_runTest(pbist_pre_boot_stage[i], (uint8_t)0);
                /* Convert signed return value (with -1 = failure and 0 = pass) to become
                 * 0 = failure and 1 = pass */
                pbist_pre_boot_stage_status[i] = testResult + 1;
                if ( testResult != 0)
                {
                    UART_printf("PBIST functional test failed for %d\n",
                                    pbist_pre_boot_stage[i]);
                    break;
                }
                #endif
            }
            #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
            for (i = 0; i < num_pbists_pre_boot; i++)
            {
                /* Run test on selected instance */
                testResult = PBIST_runTest(pbist_pre_boot_stage[i], (uint8_t)PBIST_TEST_ROM);
                /* Convert signed return value (with -1 = failure and 0 = pass) to become
                 * 0 = failure and 1 = pass */
                pbist_pre_boot_stage_rom_test_status[i] = testResult + 1;
                if ( testResult != 0)
                {
                    UART_printf("PBIST ROM test failed for %d\n",
                                    pbist_pre_boot_stage[i]);
                }
            }
            #endif
    
            /* Run pre-boot-stage LBIST's. The definitions of the pre-boot-stage LBIST's
             * are found in soc/<SOC Device>/bist_core_defs.c. */
            for (i = 0; i < num_lbists_pre_boot; i++)
            {
                /* Run test on selected instance */
                testResult = LBIST_runTest(lbist_pre_boot_stage[i]);
                lbist_pre_boot_stage_status[i] = testResult;
                if ((testResult == -1) ||
                    (testResult == LBIST_POST_COMPLETED_FAILURE) ||
                    (testResult == LBIST_POST_ATTEMPTED_TIMEOUT))
                {
                    UART_printf("LBIST functional test failed for %d\n",
                                    lbist_pre_boot_stage[i]);
                    break;
                }
            }
    
            /* After running PBIST potentially on MSMC, re-initialize the CLEC */
            testResult = PBIST_commonInit();
    
            if (testResult != 0)
            {
                UART_printf("PBIST_commonInit after pre-boot stage ...FAILED \n");
            }
    
            /* Run LBIST and PBIST before each boot stage.  The definitions of the LBIST
             * and PBIST sections for each stage are defined in
             * soc/<SOC Device>/bist_core_defs.c. */
            for (j = 0; j < NUM_BOOT_STAGES; j++)
            {
                pbist_array = pbist_array_stage[j];
                lbist_array = lbist_array_stage[j];
                for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
                {
                    PBIST_clecConfig(pbist_array[i]);
    
                    #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
                    /* Run test on selected instance */
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */
    				#if defined (SOC_J784S4)
    				if((i==27)|| (i==28)||(i==29))
    				{
    					continue;
    				}
                    #endif		
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */				
                    #if defined (SOC_J7200)
                    if((i== 6U)|| (i==7U)||(i==8U))
                    {
                        continue;
                    }
                    #endif
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */					
                    #if defined (SOC_J721S2)
                    if((i==14)|| (i==15)||(i==16))
                    {
                        continue;
                    }
                    #endif
                    testResult = PBIST_runTest(pbist_array[i], (uint8_t)PBIST_TEST_NEGATIVE);
    
                    /* Convert signed return value (with -1 = failure and 0 = pass) to become
                     * a single bit as part of bitfield with 0 = failure and 1 = pass */
                    pbist_stage_neg_status[j] |= ((uint32_t)(testResult + 1) << i);
                    if ( testResult != 0)
                    {
                        UART_printf("PBIST negative test failed for %d\n",
                                        pbist_array[i]);
                        break;
                    }
                    #else
                    /* Run test on selected instance */
                    testResult = PBIST_runTest(pbist_array[i], (uint8_t)1);
    
                    /* Convert signed return value (with -1 = failure and 0 = pass) to become
                     * a single bit as part of bitfield with 0 = failure and 1 = pass */
                    pbist_stage_neg_status[j] |= ((uint32_t)(testResult + 1) << i);
                    if ( testResult != 0)
                    {
                        UART_printf("PBIST negative test failed for %d\n",
                                        pbist_array[i]);
                        break;
                    }
                    #endif
                }
    
                for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
                {
                    #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
                    /* Run test on selected instance */	
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */	
    				#if defined (SOC_J784S4)
    				if((i==27)|| (i==28)||(i==29))
    				{
    					continue;
    				}
                    #endif	
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */					
                    #if defined (SOC_J7200)
                    if((i== 6U)|| (i==7U)||(i==8U))
                    {
                        continue;
                    }
                    #endif	
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */					
                    #if defined (SOC_J721S2)
                    if((i==14)|| (i==15)||(i==16))
                    {
                        continue;
                    }
                    #endif
                    testResult = PBIST_runTest(pbist_array[i], (uint8_t)PBIST_TEST_POSITIVE);
    
                    /* Convert signed return value (with -1 = failure and 0 = pass) to become
                     * a single bit as part of bitfield with 0 = failure and 1 = pass */
                    pbist_stage_status[j] |= ((uint32_t)(testResult + 1) << i);
                    if ( testResult != 0)
                    {
                        UART_printf("PBIST functional test failed for %d\n",
                                        pbist_array[i]);
                        break;
                    }
                    #else
                    testResult = PBIST_runTest(pbist_array[i], (uint8_t)0);
    
                    /* Convert signed return value (with -1 = failure and 0 = pass) to become
                     * a single bit as part of bitfield with 0 = failure and 1 = pass */
                    pbist_stage_status[j] |= ((uint32_t)(testResult + 1) << i);
                    if ( testResult != 0)
                    {
                        UART_printf("PBIST functional test failed for %d\n",
                                        pbist_array[i]);
                        break;
                    }
                    #endif
                }
                #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
                for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
                {
                    /* Run test on selected instance */
                    testResult = PBIST_runTest(pbist_array[i], (uint8_t)PBIST_TEST_ROM);
    
                    /* Convert signed return value (with -1 = failure and 0 = pass) to become
                     * a single bit as part of bitfield with 0 = failure and 1 = pass */
                    pbist_stage_rom_test_status[j] |= ((uint32_t)(testResult + 1) << i);
                    if ( testResult != 0)
                    {
                        UART_printf("PBIST ROM  test failed for %d\n",
                                        pbist_array[i]);
                    }
                }
                #endif
    #if defined(DEBUG)
                UART_printf( "Ran PBIST for Stage %d\n", j);
    #endif
                for (i = 0; i < num_lbists_per_boot_stage[j]; i++)
                {
                    testResult = LBIST_runTest(lbist_array[i]);
    
                    /* Convert signed return value (with -1 = failure and 0 = pass) to become
                     * a single bit as part of bitfield with 0 = failure and 1 = pass */
                    lbist_stage_status[j] |= ((uint32_t)(testResult + 1) << i);
                    if (testResult != 0)
                    {
                        UART_printf("LBIST functional test failed for %d\n",
                                        lbist_array[i]);
                        break;
                    }
                }
    #if defined(DEBUG)
                UART_printf( "Ran LBIST for Stage %d\n", j);
    #endif
                /* Signal Boot Task that BIST for the stage is completed */
                UART_printf("\n *** Boot stage %d is complete, cores for this stage may now be loaded ***\n\n", j);
            }
        }
    
        if (testResult == 0)
        {
            UART_printf("==========================\n");
            UART_printf("BIST: Example App Summary:\n");
            UART_printf("==========================\n");
            for (i = 0; i < num_pbists_pre_boot; i++)
            {
                UART_printf("BIST: Pre-boot Stage - Ran negative PBIST ID - %s, Result = %s\n",
                                pbistName(pbist_pre_boot_stage[i]),
                                testStatusPrint(pbist_pre_boot_stage_neg_status[i]));
            }
            UART_printf("Pre-boot stage - Ran %d negative PBIST total sections\n",
                            num_pbists_pre_boot);
    
            #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
            for (i = 0; i < num_pbists_pre_boot; i++)
            {
                UART_printf("BIST: Pre-boot Stage - Ran ROM Test PBIST ID - %s, Result = %s\n",
                                pbistName(pbist_pre_boot_stage[i]),
                                testStatusPrint(pbist_pre_boot_stage_rom_test_status[i]));
            }
            UART_printf("Pre-boot stage - Ran %d ROM Test of  PBIST total sections\n",
                            num_pbists_pre_boot);
            #endif
            for (i = 0; i < num_pbists_pre_boot; i++)
            {
                UART_printf("BIST: Pre-boot Stage - Ran PBIST ID - %s, Result = %s\n",
                                pbistName(pbist_pre_boot_stage[i]),
                                testStatusPrint(pbist_pre_boot_stage_status[i]));
            }
            UART_printf("Pre-boot stage - Ran %d PBIST total sections\n",
                            num_pbists_pre_boot);
            for (i = 0; i < num_lbists_pre_boot; i++)
            {
                UART_printf("BIST: Pre-boot Stage - Ran LBIST ID - %s, Result = %s\n",
                                lbistName(lbist_pre_boot_stage[i]),
                                LBIST_hwPostStatusPrint(lbist_pre_boot_stage_status[i]));
            }
            UART_printf("Pre-boot stage - Ran %d LBIST total sections\n",
                            num_lbists_pre_boot);
    
            for (j = 0; j < NUM_BOOT_STAGES; j++)
            {
                pbist_array = pbist_array_stage[j];
                lbist_array = lbist_array_stage[j];
    #if defined(GATHER_BIST_STAGE_DETAILS)
                for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
                {
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */
    				#if defined (SOC_J784S4)
    				if((i==27)|| (i==28)||(i==29))
    				{
    					continue;
    				}
                    #endif	
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */					
                    #if defined (SOC_J7200)
                    if((i== 6U)|| (i==7U)||(i==8U))
                    {
                        continue;
                    }
                    #endif
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */					
                    #if defined (SOC_J721S2)
                    if((i==14)|| (i==15)||(i==16))
                    {
                        continue;
                    }
                    #endif					
                    UART_printf("BIST: Stage %d - Ran negative PBIST ID - %s, Result = %s\n",
                                    j, pbistName(pbist_array[i]),
                                    testStatusPrint((pbist_stage_neg_status[j] >> i) & 0x1));
                }
                UART_printf("BIST: Stage %d - Ran %d negative PBIST total sections\n",
                                j, (uint32_t)num_pbists_per_boot_stage[j]);
    
                #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
                for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
                {
                    UART_printf("BIST: Stage %d - Ran ROM Test PBIST ID - %s, Result = %s\n",
                                    j, pbistName(pbist_array[i]),
                                    testStatusPrint((pbist_stage_rom_test_status[j] >> i) & 0x1));
                }
                UART_printf("BIST: Stage %d - Ran %d ROM Test PBIST total sections\n",
                                j, (uint32_t)num_pbists_per_boot_stage[j]);
    
                #endif
                for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
                {
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */
    				#if defined (SOC_J784S4)
    				if((i==27)|| (i==28)||(i==29))
    				{
    					continue;
    				}
                    #endif	
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */					
                    #if defined (SOC_J7200)
                    if((i== 6U)|| (i==7U)||(i==8U))
                    {
                        continue;
                    }
                    #endif	
                    /*MCU instances are not supported for neg and pos test, 
                    So skipped according to the pbist_first_boot_stage array sequence */					
                    #if defined (SOC_J721S2)
                    if((i==14)|| (i==15)||(i==16))
                    {
                        continue;
                    }
                    #endif				
                    UART_printf("BIST: Stage %d - Ran PBIST ID - %s, Result = %s\n",
                                    j, pbistName(pbist_array[i]),
                                    testStatusPrint((pbist_stage_status[j] >> i) & 0x1));
                }
                UART_printf("BIST: Stage %d - Ran %d PBIST total sections\n",
                                j, (uint32_t)num_pbists_per_boot_stage[j]);
    
                for (i = 0; i < num_lbists_per_boot_stage[j]; i++)
                {
                    UART_printf("BIST: Stage %d - Ran LBIST ID - %s, Result = %s\n",
                                    j, lbistName(lbist_array[i]),
                                    testStatusPrint((lbist_stage_status[j] >> i) & 0x1));
                }
                UART_printf("BIST: Stage %d - Ran %d LBIST sections\n",
                                j, (uint32_t)num_lbists_per_boot_stage[j]);
    #endif
            }
        }
    }

  • Hi, 

    Please refer to this FAQ to integrate BIST with the bootflow - [FAQ] TDA4VH-Q1: Achieving Functional Safety with Boot

    Regards,

    Josiitaa