AM6422: AM6442: Running enet_lwip_icssg example with icssg1 enabled on R5F loading from Linux

Hello Tiger, 

Please take another look at Nitika's instructions in the e2e threads that you linked in the "Original question" at the top of this e2e thread. There are a couple of other changes I would like you to make to the devicetree file that she covers.

You also want to make the other changes that she listed, like updating the resource management configuration to assign the DMA channels to the R5F instead of Linux, etc.

Regards,

Nick

Hi Nick,

I have referenced the below link already:

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1290012/am6442-running-enet_icssg_layer2-example-on-r5f-in-combination-with-linux/4945689#4945689

But can't open the links you mentioned in the above description:

https://dev.ti.com/tirex/explore/node?node=A__AWq4FjhshhpOKvzFp789JQ__AM62-ACADEMY__uiYMDcq__LATEST

https://dev.ti.com/tirex/explore/node?node=A__AVn3JGT9fqm0PbS.pegO-g__AM62-ACADEMY__uiYMDcq__LATEST 

Besides:

I have already modified both from the linux side & R5 side, here the detail information for your ref as below:

1. From linux side, the changes are in my first description in this thread to remove the icssg1.

After applying this, the icssg1 interface has been removed in the linux.

2. From r5 side, here is the detail change I have done to update the resource management to add the icssg1 for the R5 core.

Could you please help check is there any incorrect?

diff --git a/examples/networking/lwip/enet_lwip_icssg/am64x-evm/r5fss0-0_freertos/example.syscfg b/examples/networking/lwip/enet_lwip_icssg/am64x-evm/r5fss0-0_freertos/example.syscfg
index acee614..a3adda7 100644
--- a/examples/networking/lwip/enet_lwip_icssg/am64x-evm/r5fss0-0_freertos/example.syscfg
+++ b/examples/networking/lwip/enet_lwip_icssg/am64x-evm/r5fss0-0_freertos/example.syscfg
@@ -1,8 +1,8 @@
/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
- * @cliArgs --device "AM64x" --package "ALV" --part "Default" --context "r5fss0-0" --product "MCU_PLUS_SDK@07.03.01"
- * @versions {"tool":"1.18.0+3266"}
+ * @cliArgs --device "AM64x" --package "ALV" --part "Default" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM64x@09.02.01"
+ * @versions {"tool":"1.20.0+3587"}
*/

/**
@@ -15,6 +15,7 @@ const gpio1 = gpio.addInstance();
const i2c = scripting.addModule("/drivers/i2c/i2c", {}, false);
const i2c1 = i2c.addInstance();
const i2c2 = i2c.addInstance();
+const ipc = scripting.addModule("/drivers/ipc/ipc");
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
const pruicss1 = pruicss.addInstance();
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
@@ -26,6 +27,22 @@ const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
const mpu_armv77 = mpu_armv7.addInstance();
+const general = scripting.addModule("/memory_configurator/general", {}, false);
+const general1 = general.addInstance();
+const region = scripting.addModule("/memory_configurator/region", {}, false);
+const region1 = region.addInstance();
+const section = scripting.addModule("/memory_configurator/section", {}, false);
+const section1 = section.addInstance();
+const section2 = section.addInstance();
+const section3 = section.addInstance();
+const section4 = section.addInstance();
+const section5 = section.addInstance();
+const section6 = section.addInstance();
+const section7 = section.addInstance();
+const section8 = section.addInstance();
+const section9 = section.addInstance();
+const section10 = section.addInstance();
+const section11 = section.addInstance();
const enet_icss = scripting.addModule("/networking/enet_icss/enet_icss", {}, false);
const enet_icss1 = enet_icss.addInstance();

@@ -45,15 +62,24 @@ eeprom1.peripheralDriver = i2c1;
i2c1.I2C.$assign = "I2C0";
i2c1.I2C.SCL.$assign = "I2C0_SCL";
i2c1.I2C.SDA.$assign = "I2C0_SDA";
+i2c1.I2C_child.$name = "drivers_i2c_v0_i2c_v0_template1";

i2c2.$name = "CONFIG_I2C1";
i2c2.I2C.$assign = "I2C1";
i2c2.I2C.SCL.$assign = "I2C1_SCL";
i2c2.I2C.SDA.$assign = "I2C1_SDA";
+i2c2.I2C_child.$name = "drivers_i2c_v0_i2c_v0_template2";

-debug_log.enableUartLog = true;
-debug_log.enableCssLog = false;
-debug_log.uartLog.$name = "CONFIG_UART0";
+ipc.m4fss0_0 = "NONE";
+ipc.r5fss1_1 = "NONE";
+ipc.r5fss1_0 = "NONE";
+ipc.r5fss0_1 = "NONE";
+ipc.enableLinuxIpc = true;
+
+debug_log.enableUartLog = true;
+debug_log.enableCssLog = false;
+debug_log.uartLog.$name = "CONFIG_UART0";
+debug_log.uartLog.UART.$assign = "USART1";

const uart_v0_template = scripting.addModule("/drivers/uart/v0/uart_v0_template", {}, false);
const uart_v0_template1 = uart_v0_template.addInstance({}, false);
@@ -95,23 +121,202 @@ mpu_armv77.$name = "CONFIG_MPU_REGION6";
mpu_armv77.size = 27;
mpu_armv77.baseAddr = 0x60000000;

-enet_icss1.$name = "CONFIG_ENET_ICSS0";
-enet_icss1.phyToMacInterfaceMode = "RGMII";
-enet_icss1.mdioMode = "MDIO_MODE_MANUAL";
-enet_icss1.PktInfoOnlyEnable = true;
-enet_icss1.LargePoolPktCount = 32;
-enet_icss1.QoS = 3;
-enet_icss1.txDmaChannel[0].$name = "ENET_DMA_TX_CH0";
-enet_icss1.rxDmaChannel[0].$name = "ENET_DMA_RX_CH0";
-enet_icss1.rxDmaChannel[0].PacketsCount = 16;
-enet_icss1.rxDmaChannel[1].$name = "ENET_DMA_RX_CH1";
-enet_icss1.rxDmaChannel[1].PacketsCount = 16;
-enet_icss1.rxDmaChannel[1].chIdx = 1;
-enet_icss1.rxDmaChannel[1].macAddrCount = 0;
+general1.$name = "CONFIG_GENERAL0";
+general1.linker.$name = "TIARMCLANG0";
+
+region1.$name = "MEMORY_REGION_CONFIGURATION0";
+region1.memory_region.create(11);
+region1.memory_region[0].type = "TCMA_R5F";
+region1.memory_region[0].$name = "R5F_VECS";
+region1.memory_region[0].size = 0x40;
+region1.memory_region[0].auto = false;
+region1.memory_region[1].type = "TCMA_R5F";
+region1.memory_region[1].$name = "R5F_TCMA";
+region1.memory_region[1].size = 0x7FC0;
+region1.memory_region[2].type = "TCMB_R5F";
+region1.memory_region[2].$name = "R5F_TCMB0";
+region1.memory_region[2].size = 0x8000;
+region1.memory_region[3].$name = "MSRAM";
+region1.memory_region[3].auto = false;
+region1.memory_region[3].manualStartAddress = 0x70080000;
+region1.memory_region[3].size = 0xC0000;
+region1.memory_region[4].type = "FLASH";
+region1.memory_region[4].$name = "FLASH";
+region1.memory_region[4].auto = false;
+region1.memory_region[4].manualStartAddress = 0x60100000;
+region1.memory_region[4].size = 0x80000;
+region1.memory_region[5].auto = false;
+region1.memory_region[5].size = 0x80;
+region1.memory_region[5].type = "DDR_ALL";
+region1.memory_region[5].manualStartAddress = 0xA5000000;
+region1.memory_region[5].$name = "USER_SHM_MEM";
+region1.memory_region[5].isShared = true;
+region1.memory_region[5].shared_cores = ["a53ss0-0","a53ss0-1","m4fss0-0","r5fss0-1","r5fss1-0","r5fss1-1"];
+region1.memory_region[6].auto = false;
+region1.memory_region[6].size = 0x3F80;
+region1.memory_region[6].type = "DDR_ALL";
+region1.memory_region[6].$name = "LOG_SHM_MEM";
+region1.memory_region[6].manualStartAddress = 0xA5000080;
+region1.memory_region[6].isShared = true;
+region1.memory_region[6].shared_cores = ["a53ss0-0","a53ss0-1","m4fss0-0","r5fss0-1","r5fss1-0","r5fss1-1"];
+region1.memory_region[7].auto = false;
+region1.memory_region[7].size = 0xC000;
+region1.memory_region[7].type = "DDR_ALL";
+region1.memory_region[7].$name = "RTOS_NORTOS_IPC_SHM_MEM";
+region1.memory_region[7].manualStartAddress = 0xA5004000;
+region1.memory_region[7].isShared = true;
+region1.memory_region[7].shared_cores = ["a53ss0-0","a53ss0-1","m4fss0-0","r5fss0-1","r5fss1-0","r5fss1-1"];
+region1.memory_region[8].type = "DDR_ALL";
+region1.memory_region[8].$name = "DDR_0";
+region1.memory_region[8].auto = false;
+region1.memory_region[8].manualStartAddress = 0xA0100000;
+region1.memory_region[8].size = 0x1000;
+region1.memory_region[9].type = "DDR_ALL";
+region1.memory_region[9].auto = false;
+region1.memory_region[9].manualStartAddress = 0xA0101000;
+region1.memory_region[9].size = 0xEFF000;
+region1.memory_region[9].$name = "DDR_1";
+region1.memory_region[10].type = "DDR_ALL";
+region1.memory_region[10].$name = "LINUX_IPC_SHM_MEM";
+region1.memory_region[10].auto = false;
+region1.memory_region[10].manualStartAddress = 0xA0000000;
+region1.memory_region[10].size = 0x100000;
+
+section1.$name = "Vector Table";
+section1.load_memory = "R5F_VECS";
+section1.group = false;
+section1.output_section.create(1);
+section1.output_section[0].$name = ".vectors";
+section1.output_section[0].palignment = true;
+
+section2.$name = "Text Segments";
+section2.load_memory = "MSRAM";
+section2.output_section.create(5);
+section2.output_section[0].$name = ".text.hwi";
+section2.output_section[0].palignment = true;
+section2.output_section[1].$name = ".text.cache";
+section2.output_section[1].palignment = true;
+section2.output_section[2].$name = ".text.mpu";
+section2.output_section[2].palignment = true;
+section2.output_section[3].$name = ".text.boot";
+section2.output_section[3].palignment = true;
+section2.output_section[4].$name = ".text:abort";
+section2.output_section[4].palignment = true;
+
+section3.$name = "Code and Read-Only Data";
+section3.load_memory = "MSRAM";
+section3.output_section.create(2);
+section3.output_section[0].$name = ".text";
+section3.output_section[0].palignment = true;
+section3.output_section[1].$name = ".rodata";
+section3.output_section[1].palignment = true;
+
+section4.$name = "Data Segment";
+section4.load_memory = "MSRAM";
+section4.output_section.create(1);
+section4.output_section[0].$name = ".data";
+section4.output_section[0].palignment = true;
+
+section5.$name = "Memory Segments";
+section5.load_memory = "MSRAM";
+section5.output_section.create(3);
+section5.output_section[0].$name = ".bss";
+section5.output_section[0].palignment = true;
+section5.output_section[0].output_sections_start = "__BSS_START";
+section5.output_section[0].output_sections_end = "__BSS_END";
+section5.output_section[1].$name = ".sysmem";
+section5.output_section[1].palignment = true;
+section5.output_section[2].$name = ".stack";
+section5.output_section[2].palignment = true;
+
+section6.$name = "Stack Segments";
+section6.load_memory = "MSRAM";
+section6.output_section.create(5);
+section6.output_section[0].$name = ".irqstack";
+section6.output_section[0].output_sections_start = "__IRQ_STACK_START";
+section6.output_section[0].output_sections_end = "__IRQ_STACK_END";
+section6.output_section[0].input_section.create(1);
+section6.output_section[0].input_section[0].$name = ". = . + __IRQ_STACK_SIZE;";
+section6.output_section[1].$name = ".fiqstack";
+section6.output_section[1].output_sections_start = "__FIQ_STACK_START";
+section6.output_section[1].output_sections_end = "__FIQ_STACK_END";
+section6.output_section[1].input_section.create(1);
+section6.output_section[1].input_section[0].$name = ". = . + __FIQ_STACK_SIZE;";
+section6.output_section[2].$name = ".svcstack";
+section6.output_section[2].output_sections_start = "__SVC_STACK_START";
+section6.output_section[2].output_sections_end = "__SVC_STACK_END";
+section6.output_section[2].input_section.create(1);
+section6.output_section[2].input_section[0].$name = ". = . + __SVC_STACK_SIZE;";
+section6.output_section[3].$name = ".abortstack";
+section6.output_section[3].output_sections_start = "__ABORT_STACK_START";
+section6.output_section[3].output_sections_end = "__ABORT_STACK_END";
+section6.output_section[3].input_section.create(1);
+section6.output_section[3].input_section[0].$name = ". = . + __ABORT_STACK_SIZE;";
+section6.output_section[4].$name = ".undefinedstack";
+section6.output_section[4].output_sections_start = "__UNDEFINED_STACK_START";
+section6.output_section[4].output_sections_end = "__UNDEFINED_STACK_END";
+section6.output_section[4].input_section.create(1);
+section6.output_section[4].input_section[0].$name = ". = . + __UNDEFINED_STACK_SIZE;";
+
+section7.$name = "Initialization and Exception Handling";
+section7.load_memory = "MSRAM";
+section7.output_section.create(3);
+section7.output_section[0].$name = ".ARM.exidx";
+section7.output_section[0].palignment = true;
+section7.output_section[1].$name = ".init_array";
+section7.output_section[1].palignment = true;
+section7.output_section[2].$name = ".fini_array";
+section7.output_section[2].palignment = true;
+
+section8.$name = "User Shared Memory";
+section8.type = "NOLOAD";
+section8.load_memory = "USER_SHM_MEM";
+section8.group = false;
+section8.output_section.create(1);
+section8.output_section[0].$name = ".bss.user_shared_mem";
+section8.output_section[0].alignment = 0;
+
+section9.$name = "Log Shared Memory";
+section9.load_memory = "LOG_SHM_MEM";
+section9.type = "NOLOAD";
+section9.group = false;
+section9.output_section.create(1);
+section9.output_section[0].$name = ".bss.log_shared_mem";
+section9.output_section[0].alignment = 0;
+
+section10.$name = "IPC Shared Memory";
+section10.type = "NOLOAD";
+section10.load_memory = "RTOS_NORTOS_IPC_SHM_MEM";
+section10.group = false;
+section10.output_section.create(1);
+section10.output_section[0].$name = ".bss.ipc_vring_mem";
+section10.output_section[0].alignment = 0;
+
+section11.$name = "Non Cacheable Memory";
+section11.load_memory = "NON_CACHE_MEM";
+section11.group = false;
+section11.type = "NOLOAD";
+section11.output_section.create(1);
+section11.output_section[0].$name = ".bss.nocache";
+section11.output_section[0].alignment = 0;
+
+enet_icss1.$name = "CONFIG_ENET_ICSS0";
+enet_icss1.phyToMacInterfaceMode = "RGMII";
+enet_icss1.mdioMode = "MDIO_MODE_MANUAL";
+enet_icss1.PktInfoOnlyEnable = true;
+enet_icss1.LargePoolPktCount = 32;
+enet_icss1.QoS = 3;
+enet_icss1.txDmaChannel[0].$name = "ENET_DMA_TX_CH0";
+enet_icss1.rxDmaChannel[0].$name = "ENET_DMA_RX_CH0";
+enet_icss1.rxDmaChannel[0].PacketsCount = 16;
+enet_icss1.rxDmaChannel[1].$name = "ENET_DMA_RX_CH1";
+enet_icss1.rxDmaChannel[1].PacketsCount = 16;
+enet_icss1.rxDmaChannel[1].chIdx = 1;
+enet_icss1.rxDmaChannel[1].macAddrCount = 0;
enet_icss1.netifInstance.create(1);
-enet_icss1.netifInstance[0].$name = "NETIF_INST_ID0";
-enet_icss1.netifInstance[0].rxDmaChNum = ["0","1"];
-enet_icss1.PRU_ICSSG1_RGMII1.$assign = "PRU_ICSSG1_RGMII1";
+enet_icss1.netifInstance[0].$name = "NETIF_INST_ID0";
+enet_icss1.netifInstance[0].rxDmaChNum = ["0","1"];
+enet_icss1.PRU_ICSSG1_RGMII1.$assign = "PRU_ICSSG1_RGMII1";

enet_icss1.icss = pruicss1;
pruicss1.$name = "CONFIG_PRU_ICSS1";
@@ -135,9 +340,8 @@ enet_icss1.udmaDrv = udma1;
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
-debug_log.uartLog.UART.$suggestSolution = "USART0";
-debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
-debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";
+debug_log.uartLog.UART.RXD.$suggestSolution = "UART1_RXD";
+debug_log.uartLog.UART.TXD.$suggestSolution = "UART1_TXD";
enet_icss1.PRU_ICSSG1_MDIO.$suggestSolution = "PRU_ICSSG1_MDIO0";
enet_icss1.PRU_ICSSG1_MDIO.MDC.$suggestSolution = "PRG1_MDIO0_MDC";
enet_icss1.PRU_ICSSG1_MDIO.MDIO.$suggestSolution = "PRG1_MDIO0_MDIO";

Thanks,

Tiger

Hello Tiger,

Apologies, it looks like those older links broke when I rewrote the Multicore academy. These are the associated pages now:
https://dev.ti.com/tirex/explore/node?node=A__AfSHr0vWbFdGCnmoPeMXzg__AM64-ACADEMY__WI1KRXP__LATEST
https://dev.ti.com/tirex/explore/node?node=A__AaRdsK4zRjlChfPY2v0AhQ__AM64-ACADEMY__WI1KRXP__LATEST

I am running out of time in the workday. I will try to circle back and read the rest of your response tomorrow, but I am on vacation from Wednesday - Friday. If I do not respond by Tuesday of next week, please feel free to ping the thread.

Regards,

Nick

Hi Nick,

Thanks for your update the new links.

But please note that my last reply has already updated the R5 application & A53 Linux for remoteproc scenario.

For this time, I need to load the app which can support the networking function on the R5 core.

So I have included the icssg1 in the R5 by sysconfig tool, and have already removed the icssg1 interface in the device tree in the linux side.

But now, the app enet_lwip_icssg  can be loaded from linux side, but it will be stuck when calling SOC_moduleSetClockFrequency for icssg1 clock setting.

That's why I'm here to ask you help to check whether there is any missing in my side?

Thanks,

Tiger

Is there any update?