J721EXCPXEVM: SBL scratch pad memory

Hi Simon,

Sorry, did not get the question. Most likely this address is used by C7x. Can you please point me to the location of the memory?

Regards,

Brijesh

Hi,

this is from the scope of the MCU R5 running the TI SBL, talking about the following compile definition

SBL_CFLAGS += -DSBL_SCRATCH_MEM_START=0xC2000000

this sets the location of the scratch pad memory used by SBL. i find other definitions , but those are likely for test example binaries

regards,

Simon

Simon,

This is SBL scratch memory, which is defined in the sbl_component.mk file. This is internally used by SBL to store the image to be authenticated. 

Regards,

Brijesh

And which physical location is this ? DDR ? 

it is a RAT address or not ?

This is physical location, without RAT mapped. But that does not stop from using RAT. You can map using RAT and use RAT mapped address in SBL..

Regards,

Brijesh

can you point me to the techref showing that region ? i searched for it but didnt find it. Which memory unit is that ?

Sorry, did not get it. 0xC2000000 is the location used in SBL as a scratch memory. This is physical address so part of the actual memory.. 

Hi,

i want to know which pysical memory this is . i cant find the reference in the technical reference manual mentioning 0xC2000000 as a certain memory block in MCU / MSMC or other location.

regards,

Simon

Hi Simon,

This is DDR address, so will not be available in TRM.

Regards,

Brijesh

Hi,

can you please add more explanations ? 0xC2000000 is not a typical DDR address , where is it coming from and why is it not in the TRM DDR address range ?

regards,

Simon

the location is at 1056MB offset or not ? 

2GB memory starting from 0x80000000 is DDR location. 

Regards,

Brijesh