Tool/software:
Hi, TI technical team,
I encountered a memory contention problem when using am6442 for multi-core memory access. Specifically, we use 2 A53 cores to run Linux, and the other R5 cores run FreeRTOS, and DDR is used as shared memory between A53 core and R5 core.
When A core accesses a large piece of memory for write access, it will affect the execution time of R core accessing DDR, resulting in obvious fluctuations, and there is obviously memory contention. To solve this problem, I want to give R core a higher priority than A core in accessing the DDR controller. Can you give a feasible method and which registers should be set to succeed?
Best Regards
Wen