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[Help!]XDC/BIOS components eat up too much L2 RAM in CCS4.2

gavin peng
Prodigy 220 points

Hi,

After RTSC is introduced in BIOS 6(ie. SYS//BIOS) in CCS4, it is observed that much more L2 ram memory  consumed by xdc package, bios package and the rts runtime library(basically spread across the .text and .far1 memory sections) against CCS3.3.  In my ccs4.2.2 project, the total cost is even about 300kbytes or so which is totally unacceptable .  So the concern is
1. Is this a normal or internally confirmed case/issue for RTSC project?

2. Is there any way to tailor the xdc/bios/rts lib for code size optimization with no or least functionlity/performance loss? Any reference document on this topic?

Maybe I can post a *.map file if needed

Thanks very much!

BR/Gavin

  • Prodigy 220 points

    Suplements on compiling environment info:

     ===============================

    –CCS 4.2.2
    –BIOS: 6_31_04_27
    –XDC: 3.20.8.88
    –Code Generation Tools: 7.2.2 
  • TI__Mastermind 37985 points

    It's unusual to get 300kb of additional code when you switch from DSP/BIOS 5 to SYS/BIOS 6 and RTSC. Can you post your CFG script? What's the profile you selected in the RTSC tab in Project Properties->CCS Build? 

  • in reply to Sasha Slijepcevic
    Prodigy 220 points

    Hi Sasha,

    Please check  my project's main configuation as attached.

    3021.cfg.txt

    The biggest memory cost includes the .text(most from core0.pe66e.obj  and partly from rts6600e_elf.lib and ti.csl.ae66e) and .far1sections(mainly the core0.pe66e.obj). There may be some misunderstanding on the .text and .far1 sections contained in core0.pe66e.obj which was considered to be all just xdc/bios related lower level obj, but what is on earth the core0.pe66e.obj composed of? Any principle related introduction on how it is built out? Seems no any ti documents and also Nothing googled for this yet.

    Regarding  the RTSC tab configuration, do you want to check my RTSC platfrom? I created my own package as attached for the 6616e target.

    To solve this issue, Is there any way to optimize the xdc/bios related stuff and how to rebuild the rts6600e-elf.lib?

    Thanks a lot!

    BR/Gavin

  • in reply to gavin peng
    Prodigy 220 points

    In other words, Is there any benchmark data available for a full deployment of xdc/bios/rts lib in ccs4 or ccs5 project which can be a baseline reference?

  • in reply to gavin peng
    TI__Mastermind 37985 points

    Check Appendix "SIze Benchmarks" in the BIOS User's Guide (SPRUEX3), where you can find the explanation how the benchmarks are generated and where you can find them. For the version of SYS/BIOS 6 that you are using, it is very important to know what is the profile you selected in the RTSC tab in Project Properties->CCS Build? If it's 'debug' or 'release', you will end up with an unoptimized version of your configuration. Try using 'whole_program' if you aren't already and see if that makes any difference.

    In the same document I referred to above, there is also Section "Minimizing the Application Footprint". You may want to check that too.

  • in reply to Sasha Slijepcevic
    Prodigy 220 points

    Hi Sasha,

    Thanks for your information!

    Actually my key concern is on the .far.1 section from the "core0.pe66e.obj" for each project which has the same size 0x24410 (145kbytes). I need more information to know how the core0.pe66e.obj compiled out and how the realted memory lay out  in this obj defined.

    As for the SIze Benchmarks from the bios user guide, they are useful but not related to my question yet.

    The selected profile was 'whole_program' and I also tried debug/release and no change on this .far.1 sections.

    Could you have any other cluses?

    Thanks so much!

    BR/Gavin

  • in reply to gavin peng
    TI__Mastermind 37985 points

    Gavin,
    if you tried following the advice from the BIOS guide and it didn't help, we would then need to see some of the generated files. Can you post a map file for your app, and also there is another map file in the configPkg/package/cfg directory of your project. There is also a file core0_pe66e.c in the same directory that could be useful to find out what's in .far.1 section.

    That C file is compiled into an object file, which is then partially linked together with other libraries listed in an xdl file in the same directory. The result of the partial linking (plus some other step) is the file core0.pe66e.obj, which is then linked with your application. The second map file I am asking about is a byproduct of the partial link step.