EMIFA interface in Asynchronous mode on OMAP-L138

Dear E2E:

I would like to add that I use EMIFA CLK = 80MHz.

The FLASH type is RC28F128P33BF60 - it is 16-bit FLASH 16MB.

Please answer my question - how can I switch ARM to 16 bit mode.

Thank you,

Boris Ruvinsky

802-877-4978 

Hi Boris,

Yes, it looks like the EMIFA is performing a 32-bit write.  Are you using the "short" (16-bit) data type on the ARM?  Is the cache enabled or disabled? Are the EMA_WEN_DQM[1:0] byte enables active for both 16-bit access that make up the 32-bit write?

Regards,

Brad

Hi Brad.

Thank you for your respond.

I tried the "short" data type for the variable but it did not make a difference.

ARM has some default setting at Power up - I did not change any settings.

If cache is enabled at power up - that means - the cache is ON.

How can check the cache settings?

I did not check the EMA_WEN_DQM[1:0] - I thought they don't matter because I have 16-bit interface.

I will double check these signals but I expect these "byte enables" to be active because I am writhing two Bytes (16 bits)

I found in the User Manual (SPRUH77 page89) : "The ARM can operate in two states: ARM (32-bit) and Thumb (16-bit) mode. You can switch the ARM926EJ-S processor between ARM and Thumb mode using BX instruction"

Can you please explain to me - how can switch the ARM to Thumb mode using BX instruction?

Will Thumb mode resolve the problem?

I use GEL file - can it be done in GEL file?

Thank you very much for your help,

Boris Ruvinsky

Hi Brad.

Thank you for your respond.

I tried the "short" data type for the variable but it did not make a difference.

ARM has some default setting at Power up - I did not change any settings.

If cache is enabled at power up - that means - the cache is ON.

How can check the cache settings?

I did not check the EMA_WEN_DQM[1:0] - I thought they don't matter because I have 16-bit interface.

I will double check these signals but I expect these "byte enables" to be active because I am writhing two Bytes (16 bits)

I found in the User Manual (SPRUH77 page89) : "The ARM can operate in two states: ARM (32-bit) and Thumb (16-bit) mode. You can switch the ARM926EJ-S processor between ARM and Thumb mode using BX instruction"

Can you please explain to me - how can switch the ARM to Thumb mode using BX instruction?

Will Thumb mode resolve the problem?

I use GEL file - can it be done in GEL file?

Thank you very much for your help,

Boris Ruvinsky

Boris,

No, the ARM cache is not on by default.  Please check the DQMs and let me know.  Are you experiencing any data errors?

ARM Thumb mode allows the ARM to processes 16-bit Thumb instructions.  It has no effect on the ARM performing writes to NOR Flash.

Regards,

Brad

Hi Brad,

Thank you again for your help.

Unfortunately I can't check DQMs - they are not used and not connected to the PCB under BGA package.

DQMs are just left unconnected because they are not used.

I don't see any data errors on EMIFA interface.

I am reading the correct ID and default configuration data from FLASH.

The problem with the FLASH - the double (32-bit) writes which do not allow me to create the correct command sequence to the FLASH.

How can I check if the cache is on?

Why do want to check DQMs?

You probably suspect - that EMFIA is still in 8-bit mode and ARM is doing two writes to 16-bit FLASH? Is it correct?

Is there any other way (without DQMs) to check that?

Thank you,

Boris

Not a problem that you can't check the DQMs.  I wanted to see if all 16-bits of one half of the 32-bit write you are seeing were being masked.

The cache enable bit is in the CP15 Control register c1, and I believe you would have to write an ARM assembly instruction to read or write its value.  You can check the ARM926EJ-S user guide at arm.com for details.  It's not enabled by default.

Can you check the disassembly and let me know the exact ARM store instruction that is used to write the data to the flash on EMIFA?

Thanks,

Brad