AM625: SPI0 false detection.

Part Number: AM625

Tool/software:

Hello There,

we have custom board based on AM625.

Which has two flash on main_spi0 with CS0 and CS1.

Issue : I unmounted the flash IC from CS1 and boot device, still it's detecting the flash on CS1. It's showing false detection.

root@sm2s-am6254:~# cat /proc/mtd
dev:    size   erasesize  name
mtd0: 10000000 00020000 "spi0.0"
mtd1: 00800000 00001000 "spi1.1"  <<< false detection   
mtd2: 00800000 00001000 "spi1.0"
mtd3: 00800000 00001000 "spi2.1"  <<< false detection
mtd4: 00800000 00001000 "spi2.0"
root@sm2s-am6254:~#

 

Device tree given below.

&main_pmx0 {
	main_spi0_pins_default: main-spi0-pins-default {
					pinctrl-single,pins = <
							AM62X_IOPAD(0x1bc, PIN_OUTPUT, 0) /* (A14) SPI0_CLK */
							AM62X_IOPAD(0x1c0, PIN_INPUT, 0) /* (B13) SPI0_D0 */
							AM62X_IOPAD(0x1c4, PIN_INPUT, 0) /* (B14) SPI0_D1 */
							AM62X_IOPAD(0x1b4, PIN_OUTPUT, 0) /* (A13) gpio1.15 SPI0_CS0 */
							AM62X_IOPAD(0x1b8, PIN_OUTPUT, 0) /* (C13) gpio1.16 SPI0_CS1 */
					>;
			};
};

&main_spi0 {
        status="okay";
        pinctrl-names = "default";
        pinctrl-0 = <&main_spi0_pins_default>;
        ti,spi-num-cs = <2>;
        ti,pindir-d0-out-d1-in;
		
		flash1@0 {
                                compatible = "winbond,w25q64dw", "jedec,spi-nor";
                                spi-max-frequency = <24000000>;
                                m25p,fast-read;
                                reg = <0x0>;
                        };
						
		flash2@1 {
                                compatible = "winbond,w25q64dw", "jedec,spi-nor";
                                spi-max-frequency = <24000000>;
                                m25p,fast-read;
                                reg = <0x1>;
                        };
};




We have probed the signals of CS0 and CS1, both pins goes low at a time. Attaching the signal below.




Please guide us what can be the issue ? Is it about chip select time-out ?


Thanks and regards,
Ishan

  • Hi Ishan,

    Are you defining any mtd partitions in the device tree? How does that look like?

    Also, what does your kernel command line look like (`cat /proc/cmdline`)? Usually partitions get passed in that way via `mtdparts`. This mechanism overrides what's in the device tree (can also be controlled via CONFIG_MTD_CMDLINE_PARTS).

    Lastly, (probably nothing to do with the issue you are raising here) but SPI0_CLK should be defined as PIN_INPUT, there's a note in regards to this in the TRM.

    Regards, Andreas

  • Hello Andreas,

    Thank you for the replay,

    1) Not defining any mtd partitions in device tree, device tree node looks like as below

    &main_pmx0 {
    	main_spi0_pins_default: main-spi0-pins-default {
    					pinctrl-single,pins = <
    							AM62X_IOPAD(0x1bc, PIN_INPUT, 0) /* (A14) SPI0_CLK */
    							AM62X_IOPAD(0x1c0, PIN_INPUT, 0) /* (B13) SPI0_D0 */
    							AM62X_IOPAD(0x1c4, PIN_INPUT, 0) /* (B14) SPI0_D1 */
    							AM62X_IOPAD(0x1b4, PIN_OUTPUT, 0) /* (A13) gpio1.15 SPI0_CS0 */
    							AM62X_IOPAD(0x1b8, PIN_OUTPUT, 0) /* (C13) gpio1.16 SPI0_CS1 */
    					>;
    			};
    			
    	main_spi1_pins_default: main-spi1-pins-default {
                    pinctrl-single,pins = <
                            AM62X_IOPAD(0x0020, PIN_INPUT, 1) /* (J25) OSPI0_D5.SPI1_CLK */
                            AM62X_IOPAD(0x001c, PIN_OUTPUT, 1) /* (J23) OSPI0_D4.SPI1_CS0 */
                            AM62X_IOPAD(0x0034, PIN_OUTPUT, 1) /* (H21) OSPI0_CSn2.SPI1_CS1 */
                            AM62X_IOPAD(0x0024, PIN_INPUT, 1) /* (H25) OSPI0_D6.SPI1_D0 */
                            AM62X_IOPAD(0x0028, PIN_INPUT, 1) /* (J22) OSPI0_D7.SPI1_D1 */
                    >;
            };
    };
    
    &main_spi0 {
            status="okay";
            pinctrl-names = "default";
            pinctrl-0 = <&main_spi0_pins_default>;
            ti,spi-num-cs = <2>;
            ti,pindir-d0-out-d1-in;
    		
    		flash1@0 {
                                    compatible = "winbond,w25q64dw", "jedec,spi-nor";
                                    spi-max-frequency = <24000000>;
                                    m25p,fast-read;
                                    reg = <0x0>;
                            };
    						
    		flash2@1 {
                                    compatible = "winbond,w25q64dw", "jedec,spi-nor";
                                    spi-max-frequency = <24000000>;
                                    m25p,fast-read;
                                    reg = <0x1>;
                            };
    };
    
    &main_spi1 {
            status="okay";
            pinctrl-names = "default";
            pinctrl-0 = <&main_spi1_pins_default>;
            ti,spi-num-cs = <2>;
            ti,pindir-d0-out-d1-in;
            
            flash1@0 {
                    compatible = "winbond,w25q64dw", "jedec,spi-nor";
                    spi-max-frequency = <24000000>;
                    m25p,fast-read;
                    reg = <0>;
            };
    
            flash2@1 {
                    compatible = "winbond,w25q64dw", "jedec,spi-nor";
                    spi-max-frequency = <24000000>;
                    m25p,fast-read;
                    reg = <1>;
            };
    };
    


    2) "/proc/cmdline" looks like below.
    root@sm2s-am6254:~# cat /proc/cmdline             
    console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 mtdparts=spi-nand0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),98048k@32m(ospi.rootfs),256k@130816k(ospi.phyp
    attern);omap2-nand.0:2m(NAND.tiboot3),2m(NAND.tispl),2m(NAND.tiboot3.backup),4m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup),-(NAND.file-system) root=PARTUUID=cc8878cf-02 rw rootfstype=ext4 ro
    otwait
    


    also checked from u-boot
    => print mtdparts 
    mtdparts=mtdparts=spi-nand0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),98048k@32m(ospi.rootfs),256k@130816k(ospi.phypattern);omap2-nand.0:2m(NAND.tiboot3),2m(NAND.tisp
    l),2m(NAND.tiboot3.backup),4m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup),-(NAND.file-system)
    


    3) kernel config "CONFIG_MTD_CMDLINE_PARTS" is also enabled 


    As you mentioned it can override the device tree, i have changed the mtdparts from u-boot. still it's getting false SPI flash detection. Detailed logs are given below.
    U-Boot 2023.04 (Oct 29 2024 - 10:45:21 +0000)
    
    SoC:   AM62X SR1.0 HS-FS
    Model: Avnet sm2s-am6254 smarc module
    DRAM:  2 GiB
    Core:  82 devices, 31 uclasses, devicetree: separate
    MMC:   mmc@fa10000: 0, mmc@fa00000: 1
    Loading Environment from MMC... OK
    In:    serial@2800000
    Out:   serial@2800000
    Err:   serial@2800000
    Net:   eth0: ethernet@8000000port@1
    Hit any key to stop autoboot:  0 
    => 
    => 
    => print mtdparts
    ## Error: "mtdparts" not defined
    => 
    
    
    root@sm2s-am6254:~# 
    root@sm2s-am6254:~# 
    root@sm2s-am6254:~# cat /proc/cmdline 
    console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 root=PARTUUID=cc8878cf-02 rw rootfstype=ext4 rootwait
    root@sm2s-am6254:~# 
    
    root@sm2s-am6254:~# cat /proc/mtd    
    dev:    size   erasesize  name
    mtd0: 10000000 00020000 "spi0.0"        <<            QSPI
    mtd1: 00800000 00001000 "spi1.1"        <<          false detection
    mtd2: 00800000 00001000 "spi1.0"        <<
    mtd3: 00800000 00001000 "spi2.1"        <<          false detection
    mtd4: 00800000 00001000 "spi2.0"
    root@sm2s-am6254:~# 
    
    



    Please guide us for the same, For debugging purpose i have also saved the digital signals from logic analyser, but not able to attached (upload) it here. 

    So just attaching screen shot of initial sequence of signals 

    both observations are taken on SPI0.


    Thanks and Regards
    Ishan

  • Hi Ishan,

    I just noticed this thread is still open. Have you been able to figure out what the issue is?

    Regards, Andreas