J722SXH01EVM: How to use J722S to debug Mipi devices (non camera)

Hi 

Unfortunately, no there isn't any fifo from where we can read the data captured and can confirm its working. Data will be saved in DDR using DMA and we need to check the interrupt callback to confirm its working. Once data is captured, you can send the captured data to DSP using IPC. 

Regards,

Brijesh  

HI experts

I referred to the logic of the camera and set the general settings register, but I still haven't seen the data output. I don't know if the values of these registers are set correctly. Can you help me confirm?

devices:

clk:400M

data format:RAW8

lane num:4

registers:

root@j722s-evm:/home/testApp# ./devmem2_info.ch
++++++++++++++++++++++++++++++\n
+++++csi:0x30101000:cfg set+++\n
++++++++++++++++++++++++++++++\n
CSI2RX_DEVICE_CFG_REG:0x30101000
/dev/mem opened.
Memory mapped at address 0xffff99af5000.
Read at address  0x30101000 (0xffff99af5000): 0x8421164C
CSI2RX_SOFT_RESET_REG:0x30101004
/dev/mem opened.
Memory mapped at address 0xffffaa0da000.
Read at address  0x30101004 (0xffffaa0da004): 0x00000000

CSI2RX_STATIC_CFG_REG:0x30101008
/dev/mem opened.
Memory mapped at address 0xffff8ed2d000.
Read at address  0x30101008 (0xffff8ed2d008): 0x43210400

csirx_dphy_lane_control:0x30101040
/dev/mem opened.
Memory mapped at address 0xffff9df5c000.
Read at address  0x30101040 (0xffff9df5c040): 0x0001F01F

CSI2RX_STREAM_CTRL_REG:0x30101100
/dev/mem opened.
Memory mapped at address 0xffff99d52000.
Read at address  0x30101100 (0xffff99d52100): 0x00000001

csirx_stream0_status:0x30101104
/dev/mem opened.
Memory mapped at address 0xffffaf103000.
Read at address  0x30101104 (0xffffaf103104): 0x80000111

CSI2RX_STREAM_DATA_CFG_REG:0x30101108
/dev/mem opened.              
Read at address  0x30101108 (0xffff9320e108): 0x000100AA

CSI2RX_STREAM_CFG_REG:0x3010110C
/dev/mem opened.
Memory mapped at address 0xffff88c4c000.
Read at address  0x3010110C (0xffff88c4c10c): 0x00000100

CSIRX_STREAM0_MONITOR_CTRL:0x30101110
/dev/mem opened.
Memory mapped at address 0xffffad5db000.
Read at address  0x30101110 (0xffffad5db110): 0x0C008010

-----csi2 check info----------\n
csirx_monitor_irqs_mask_cfg:0x30101110
/dev/mem opened.
Memory mapped at address 0xffff984fc000.
Read at address  0x30101018 (0xffff984fc018): 0x00000000

csirx_monitor_irqs_mask_cfg:0x30101110
/dev/mem opened.
Memory mapped at address 0xffffb90cb000.
Read at address  0x3010101C (0xffffb90cb01c): 0x000000FF

csirx_info_irqs:0x30101020
/dev/mem opened.
Memory mapped at address 0xffff9b6ab000.
Read at address  0x30101020 (0xffff9b6ab020): 0x00000000

csirx_info_irqs_mask_cfg:0x30101024
/dev/mem opened.
Memory mapped at address 0xffffae9ac000.
Read at address  0x30101024 (0xffffae9ac024): 0x00007FFF

csirx_error_irqs:0x30101028
/dev/mem opened.
Memory mapped at address 0xffff92ca2000.
Read at address  0x30101028 (0xffff92ca2028): 0x00000100  or  0x00001401

csirx_error_irqs_mask_cfg:0x3010102c
/dev/mem opened.
Memory mapped at address 0xffffb6100000.
Read at address  0x3010102C (0xffffb610002c): 0x00011FF1

csirx_dphy_status:0x30101048
/dev/mem opened.
Memory mapped at address 0xffff7ffc8000.
Read at address  0x30101048 (0xffff7ffc8048): 0x00333306

csirx_dphy_err_status_irq:0x3010104C
/dev/mem opened.
Memory mapped at address 0xffff8ec29000.
Read at address  0x3010104C (0xffff8ec2904c): 0x00000000

csirx_dphy_err_irq_mask_cfg:0x30101050
/dev/mem opened.
Memory mapped at address 0xffff9437b000.
Read at address  0x30101050 (0xffff9437b050): 0x00000000

csirx_integration_debug:0x30101060
/dev/mem opened.
Memory mapped at address 0xffffbde0d000.
Read at address  0x30101060 (0xffffbde0d060): 0x10000000

csirx_dphy_err_irq_mask_cfg:0x30101074
/dev/mem opened.
Memory mapped at address 0xffff88f9d000.
Read at address  0x30101074 (0xffff88f9d074): 0x00000000

csirx_test_generic:0x30101080
/dev/mem opened.
Memory mapped at address 0xffffb6fc5000.
Read at address  0x30101080 (0xffffb6fc5080): 0x00000000

csirx_asf_int_raw_status:0x30101904
/dev/mem opened.
Memory mapped at address 0xffff9b063000.
Read at address  0x30101904 (0xffff9b063904): 0x00000000

csirx_asf_int_mask:0x30101908
/dev/mem opened.
Memory mapped at address 0xffffa9ba6000.
Read at address  0x30101908 (0xffffa9ba6908): 0x0000007F

CIE2RX_STREAM_MONITOR_CTRL_REG:0x30101110
/dev/mem opened.
Memory mapped at address 0xffffa6d73000.
Read at address  0x30101110 (0xffffa6d73110): 0x0C008010

CIE2RX_STREAM_MONITOR_FRAME_REG:0x30101114
/dev/mem opened.
Memory mapped at address 0xffffab791000.
Read at address  0x30101114 (0xffffab791114): 0x00000000

CIE2RX_STREAM_MONITOR_LB_REG:0x30101118
/dev/mem opened.
Memory mapped at address 0xffff94eb0000.
Read at address  0x30101118 (0xffff94eb0118): 0x00000000

csirx_stream0_fifo_fill_lvl:0x30101128
/dev/mem opened.
Memory mapped at address 0xffffbecd2000.
Read at address  0x30101128 (0xffffbecd2128): 0x00001000

++++++++++++++++++++++++++++++\n
+++++shim:0x30102000+++++++++++\n
++++++++++++++++++++++++++++++\n
SHIM_CNTL:0x30102010
/dev/mem opened.
Memory mapped at address 0xffff9f51c000.
Read at address  0x30102010 (0xffff9f51c010): 0x00000F01

SHIM_DMACNTX:0x30102040
/dev/mem opened.
Memory mapped at address 0xffffafe85000.
Read at address  0x30102020 (0xffffafe85020): 0x8C00002A

SHIM_PSI_CFG0:0x30102024
/dev/mem opened.
Memory mapped at address 0xffffb8033000.
Read at address  0x30102024 (0xffffb8033024): 0x00000000

++++++++++++++++++++++++++++++\n
++++dphy2:0x30110000+++++++++++\n
++++++++++++++++++++++++++++++\n
dphy2:0x30110000
/dev/mem opened.
Memory mapped at address 0xffffb8abd000.
Read at address  0x30110000 (0xffffb8abd000): 0x00000000

dphy0 PSC DPHY_BAND_CFG:0x30110b00
/dev/mem opened.
Memory mapped at address 0xffff8b15a000.
Read at address  0x30110B00 (0xffff8b15ab00): 0x000001CE

dphy0 PSC DPHY_POWER_ISLAND_EN_DATA:0x30110b08
/dev/mem opened.
Memory mapped at address 0xffffa4f09000.
Read at address  0x30110B08 (0xffffa4f09b08): 0xAAAAAAAA

dphy0 PSC DPHY_POWER_ISLAND_EN_CLK:0x30110b0C
/dev/mem opened.
Memory mapped at address 0xffff8f428000.
Read at address  0x30110B0C (0xffff8f428b0c): 0x000000AA

dphy0 PSC:0x30110C00
/dev/mem opened.
Memory mapped at address 0xffffb74fd000.
Read at address  0x30110C00 (0xffffb74fdc00): 0x0000050F

dphy0 DPHY_ISO_CL_CTRL_L:0x30110C10
/dev/mem opened.
Memory mapped at address 0xffff8df05000.
Read at address  0x30110C10 (0xffff8df05c10): 0x00000029

dphy0 DPHY_ISO_DL_CTRL_L0:0x30110C14
/dev/mem opened.
Memory mapped at address 0xffff867d9000.
Read at address  0x30110C14 (0xffff867d9c14): 0x0000000D

dphy0 DPHY_ISO_DL_CTRL_L1:0x30110C20
/dev/mem opened.
Memory mapped at address 0xffffa7254000.
Read at address  0x30110C20 (0xffffa7254c20): 0x00000005

dphy0 DPHY_ISO_DL_CTRL_L2:0x30110C30
/dev/mem opened.
Memory mapped at address 0xffff8c2fe000.
Read at address  0x30110C30 (0xffff8c2fec30): 0x0000000D

dphy0 DPHY_ISO_DL_CTRL_L3:0x30110C3c
/dev/mem opened.
Memory mapped at address 0xffff9a503000.
Read at address  0x30110C3C (0xffff9a503c3c): 0x00000005

dphy0 DPHY_LANE:0x30111000
/dev/mem opened.
Memory mapped at address 0xffff8b52a000.
Read at address  0x30111000 (0xffff8b52a000): 0x40800000

++++++++++++++++++++++++++++++\n

thansk!

First of all, are you using Linux driver or RTOS driver for CSIRX? Are you following application note on adding a new image sensor in the imaging layer? It seems your output format is RAW8, are you also tagging this data with the correct CSI/MIPI format? 

Regards,

Brijesh

Hi expert

I am using Linux driver(cdns_csi2rx && j721-csi2rx) for CSIRX.i have added device trees and driver modifications as required. The CSI/MiPI tag data format is 0x2a (RAW).

one chip has 16400 bytes, and a frame has 128 chips. Is it possible that this frame data is too large to be collected?

How do I configure the registers of dhpy/csi-rx_if/csi2rx_sthim for this situation?

thanks!

hi,

I am sorry, but i am not familiar with the Linux driver. As such, CSIRX can capture this data, 16400 x 128 frames, but not sure how to configure it on Linux driver. Is it possible for you to use RTOS driver? 

Regards,

Brijesh

Hi

I used this example(${SDK_PATH}/examples/drivers/csirx/csirx_capture_testapp.) to test RTOS , but no frame captured.

Does the example's deserializer need to be modified if the development board is directly connected to the camera and how to modify it

SDK_VER:10.0.00

thanks

Hi,

Yes, you need to update the SERDES and sensor configuration in the SetSensorConfig APi. This is where this example configures SERDES and sensor.. 

Regards,

Brijesh

Thank you for your reply. I can already receive the data, but the data length obtained by DMA is 768 bytes. My frame is 16384 * 128 bytes. Do you know how to modify those parameters

ok, that means you need to set the width as 16384 and height as 128 and keep the frame format as RAW8. 

Regards,

Brijesh

HI.

Do you know how to set up DMA/PSILSS as the width as 16384 and height as 128。I'm not using the V4L2 framework and don't know where to set it up。

thanks！

Hi,

This should be taken care by the driver. For receiving this data, you just need to setup DMA, and it's taken care by the driver. Are you using Linux driver or RTOS driver? RTOS driver just require camera frame size to be updated and rest will be taken care by the driver.. 

Regards,

Brijesh