Tool/software:
Is CTRLMMR_PADCONFIG171 register in the following data sheet a mistake for CTRLMMR_PADCONFIG64 register?
TDA4VH-Q1, TDA4AH-Q1, TDA4VP-Q1, TDA4AP-Q1 Jacinto
Processors datasheet (Rev. B)
J784S4_Registers_20240628.xlsx shows that CTRLMMR_PADCONFIG is only up to 71.
Looking at the device tree, it appears that MMC1_CLKLB is assigned to CTRLMMR_PADCONFIG64 (0x0011C100).
ti-u-boot-2023.04+gitAUTOINC+f9b966c674/arch/arm/dts/k3-j784s4-evm.dts
main_mmc1_pins_default: main-mmc1-pins-default {
pinctrl-single,pins = <
J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */
J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */
J784S4_IOPAD(0x100, PIN_INPUT, 0) /* (No Pin) MMC1_CLKLB */
J784S4_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA33) MMC1_DAT0 */
J784S4_IOPAD(0x0f8, PIN_INPUT, 0) /* (AB34) MMC1_DAT1 */
J784S4_IOPAD(0x0f4, PIN_INPUT, 0) /* (AA32) MMC1_DAT2 */
J784S4_IOPAD(0x0f0, PIN_INPUT, 0) /* (AC38) MMC1_DAT3 */
J784S4_IOPAD(0x0e8, PIN_INPUT, 8) /* (AR38) TIMER_IO0.MMC1_SDCD */
>;
};
* When the RXACTIVE bit of PADCONFIG64 was 0, the SD card could not be accessed; when it was 1, it could be accessed.
