AM625: SPI Peripheral mode (system SPI on PRU)

Tool/software:

Hi PRU / MCU SDK experts,

I have a device (SPI master) that is connected to the am625 and it continuously streaming 24 bits of data running on 17mHz clock.

I I found the section "12.2.3.4.4.4 Peripheral Receive-Only Mode" in the TRM and followed the steps.

Attached is my small PRU program and I am hoping any expert here could spend a few minutes of your time to review my configurations and tell me if I'm missing something?.

1. In the code I set the WL = 24 SPI word length (to align to the SPI master), MOA is set to 1, configured the FIFO and AFL set to 2. Is this the right way to configure the FIFO (buffer 64 bytes), 24 bit data?. 

2. Since the WL is set to 24, I am expecting the return value of MCSPI0_CFG.RX0 is 24-bit data.

But, the RX0 still returning a 32bit data instead of 24bit. Is that a valid behavior?

void Init_SPI(void)
{
	//Step 1
	MCSPI0_CFG.SYSCONFIG_bit.SoftReset = 1;
	while (MCSPI0_CFG.SYSSTATUS_bit.ResetDone != 1);

	//12.2.3.4.4 MCSPI Peripheral Mode
	MCSPI0_CFG.CH0CONF_bit.TRM = 1; // receive only
	MCSPI0_CFG.CH0CONF_bit.SPIENSLV = 1; // peripheral
	MCSPI0_CFG.CH0CONF_bit.WL = 24; //SPI word length
	MCSPI0_CFG.CH0CONF_bit.FFER = 1; //FIFO enable for rx only
	MCSPI0_CFG.CH0CONF_bit.IS = 1;
	MCSPI0_CFG.CH0CONF_bit.DPE0 = 0;
	MCSPI0_CFG.CH0CONF_bit.DPE1 = 0;

	MCSPI0_CFG.MODULCTRL_bit.MS = 1; //peripheral mode
	MCSPI0_CFG.MODULCTRL_bit.MOA = 1; //Multiple word ocp access

	/*
	PIN34 is set to 0x1, a multiword transfer can be performed without needing
	the external MCSPI controller to deactivate SPIEN[i] between each word as in this case the MCSPI module
	works in 3-pin peripheral mode and SPIEN[i] is not needed
	*/
	MCSPI0_CFG.MODULCTRL_bit.PIN34 = 1;

	//MCSPI0_CFG.XFERLEVEL_bit.WCNT = 0;

	/*  Calculate buffer width shift value.
     *  When dataWidth <= 8,           bufWidth = uint8_t  (1 byte - 0 shift)
     *  When dataWidth > 8  && <= 16,  bufWidth = uint16_t (2 bytes - 1 shift)
     *  When dataWidth > 16 && <= 32,  bufWidth = uint32_t (4 bytes - 2 shift)
     */
	MCSPI0_CFG.XFERLEVEL_bit.AFL = 2; //For RX buffer

	// set input directions
	MCSPI0_CFG.SYST_bit.SPIENDIR = 1;
	MCSPI0_CFG.SYST_bit.SPIDATDIR0 = 1;
	MCSPI0_CFG.SYST_bit.SPIDATDIR1 = 1;
	MCSPI0_CFG.SYST_bit.SPICLK = 1;
	MCSPI0_CFG.SYST_bit.SSB = 1;

	MCSPI0_CFG.CH0CTRL_bit.En = 1;
}

void readStream()
{
	volatile uint32_t i = 0;
	volatile uint32_t buff;
	volatile int store_data = 0;

	memset((void *)MEM_BUFFER_ADDR, 0x0, 0xA00000);

	while (1)
	{
		while (MCSPI0_CFG.CH0STAT_bit.RXFFE != 0);
		while (MCSPI0_CFG.CH0STAT_bit.EOT != 1);
		while (MCSPI0_CFG.CH0STAT_bit.RXFFF != 1);
		while (MCSPI0_CFG.CH0STAT_bit.RXS != 1);

		buff = MCSPI0_CFG.RX0;


		*(volatile uint32_t *)(MEM_BUFFER_ADDR+i) = buff;
		i += 4;
		

		if (i >= BUFFER_LEN)
			break;
	}
}

Regards,

John