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DM365 RSZ_INT_DMA interrupt.

Jan Pohanka
Expert 1310 points

Hello all,

I need to interface an 800x600 CMOS sensor outputing YUV422 to dm365 processor. The output looks as following. VSYNC goes high, then there is a number of HSYNC pulses equals to height (the first one goes hight 6 clocks after VSYNC)  and VSYNC goes low 6 clocks after last HSYNC falling edge.

I'm using linux dvsdk version 4.02, with kernel 2.6.32 - after modifying the vpfe_capture driver to support UYVY sensor, I'm facing the following problem. When the sensor outputs at least three lines (HSYNCs) more then the driver requests everything is OK - I get VDINT0 interrupt followed by RSZ_INT_DMA and the sensor data are succesfully captured. When the sensor outputs the same number of lines I get VDINT0 interrupt only. It seems like the resizer is waiting to more input, but I cant figure out why. I have also tried to use another interrupts (RSZ_INT_EOF0) but the behavior was the same. According to the VPFE Guide these interrupts should be triggered when the whole frame is written to the RAM.

Could please anyone give me some hint how to deal with described issue? The problem is for example that I'm not able to capture full native resolution of the sensor.

I have posted similar request here http://e2e.ti.com/support/embedded/f/354/p/143585/518169.aspx#518169 but it is without response so excuse me for doubling.

 with best regards
Jan

  • 0
    Prodigy 195 points

    The RSZ_INT_DMA and RSZ_INT_EOF0 interrupts are not raised if the scale factor in V_DIF is slightly too high (it never reaches a "DMA complete" condition). This can happen if you have rounding errors in your calculation for V_DIF, for example.

    You could try reducing V_DIF a little to check if it is this.

  • 0 in reply to KAL1
    Expert 1310 points

    Hello,

    I have found the source of my problems - the sensor disables HSYNC generation while vertical blanking period, but the IPIPE needs several additional HSYNC pulses to complete the frame.

    regards
    Jan