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State of pin XF on a TMS320C5505 when powered down ??

Hi,

I am having some trouble finding the details for the impedance state of the C5505 GPIO pins when the DSP is powered-down.

Mainly the pin XF. For instance what the state of the XF pin is when the DSP is powered-down ? Is it in a high impedance state ? What maximum voltage can this XF pin tolerate ? if say it is connected to a 100K pull-up to 5V and the DSP is powered-down will this damage it ?

Many thanks in advance.

M

  • Hi Marin,

    Is the IO power still on when the DSP is powered down?If so, bus-holders are enabled on the XF pin in this scenario holding the pin in the last state. Please see sections 4.8.2 and 6.3.2 of the C5505 datasheet (http://www.ti.com/lit/gpn/tms320c5505). Section 5 gives max voltage allowed on device pins: -0.5V to 4.2V.

     

  • Hi, thanks will look into it. Bascially there is no power connected when DSP is powered down, so the I/O is not powered either (all is switched off).

    In this case the bus-holders would not be enabled as mentioned in those sections, so what is the state in this situation for the pin XF (which is a GPO only) ? Just wondering as this GPO is not mentioned in the data ...

    cheers, M

  • M MARIN said:

    In this case the bus-holders would not be enabled as mentioned in those sections, so what is the state in this situation for the pin XF (which is a GPO only) ? Just wondering as this GPO is not mentioned in the data ...

     

    To be precise, what is the impedance of the XF pin when all is powered down ? I will need to work out what pull-up will be needed to this pin as there are some other active circuits that are always on, even though the DSP is all off ...

    Hope this clears up my question.

    thanks in advance, M