Tool/software:
Dear Team,
We would like to do a discrete time synchronization on AM68A. We have external 10MHz master clk and PPS that we need to connect to AM68A CPTS, how can we do that ?
In this case we have two signals from a AM64 master 10MHz clk signal and PPS signal.
The idea was to connect the PPS signal to CPTS0_HW2TSPUSH ( AD28) and 10MHz clk to CPTS0_REF_CLK (AB26)
But we noted that as per DS CPTS0_REF_CLK only accepts clock ranges from 125MHz to 200MHz. Is that correct or can we also use 10MHz clk for this input?
Another idea was to use the EXT_REFCLK1 ( can receive up to 100MHz clk), but as we see this can't be routed to the CPTS0 RCLK, is that correct ?
-> the table Table 5-32. Modules Controlled by PLL don't show the EXT_REFCLK1 in the table?
-> the table Table 5-33. Clock Mapping shows that EXT_REFCLK1 can be connected to cpts_rft_clk ?
-> EXT_REFCLK1 can be only routed to PLL4 as per picture below ?
Best Regards,
d.