Missing counter register

Hi Roland,

The Cortex-A8 has specialized performance counters designed in.  ARM provides information on how to access these counters:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka4237.html

There is a cycle counter that runs in one of two modes:

1. direct cycle count

2. Count every 64th cycle.

Unfortunately the ARM assembly file syntax is different than TI's compiler or gcc compiler.

I do have an older version of this file which has already been converted to TI's assembly file syntax, which I can post if you are interested.

Hi Jeff,

thanks. That seems to be exactly what I need. Since I have no experience with TI assembly file syntax, posting the older file would be helpful.

Best regards,

Roland

Hi Jeff,

I got the example code compiled, but moving CP15 register from/to R0 makes processor stick in dead loop (PC=20080h). This happens for all MCR/MRC instrcutions. Here's my translation to TI's syntax:

  .align 8
  .state16
  .arm
  .text

  .export getPMN
  ; Returns the number of progammable counters
  ; uint32_t getPMN(void)
getPMN:
  MRC     p15, #0, r0, c9, c12, #0 ; Read PMNC Register
  MOV     r0, r0, LSR #11        ; Shift N field down to bit 0
  AND     r0, r0, #0x1F          ; Mask to leave just the 5 N bits
  BX      lr
  ;ENDP

...

Do I have to turn CP15 on? Unfortunately, I couldn't find a corresponding PRCM register.

Regards,

Roland

I've got it working. I had not entered supervisor mode (CPSR.M = 0x13).