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TDA4VM: H timing superframe

Part Number: TDA4VM

Tool/software:

Hello TI experts,

Our TDA4 DSI outputs a 2560*800 superframe.

but it seems that our fpdlink serializer ds981 does not support splitter, so we use its CROP mode for splitting;

But it is found that it can only handle 30fps superframe(1280*2) and the blanking area in the H direction cannot be multiplied by 2:

#question 1: Does the H-direction blanking area of a 2560*800 superframe have to be *2?

#Question 2: If the H direction is not multiplied by *2, will this timing affect the effective output of DSI_TX?

This is our LCD spec:

Looking forward to your reply;

  • Hi Barry,

    I come mainly from the TDA4VM background, so my responses will be from TDA4VM perspective.

    #question 1: Does the H-direction blanking area of a 2560*800 superframe have to be *2?

    No, if it is a single frame, then blanking intervals should not need to be multiplied by 2.

    #Question 2: If the H direction is not multiplied by *2, will this timing affect the effective output of DSI_TX?

    I'm not sure if I understood the question. But, if the question is instead of sending 2560x800@60Hz, how would sending 1280x800@60Hz affect output, then the output from TDA4VM's DSI interface will reduce to half when comparing the two, since the frame size is halved. 

    On a side note, where is the bottleneck in the pipeline? I saw on the datasheet for DS90UH981 that it is suitable for 4k at 60Hz resolution, which should be less than 2560*800 at 60Hz in terms of bandwidth. And I assume the LCD is only getting half of the superframe.

    Regards,

    Takuma