AM6442: GPIO bank vs. pin interrupts, routing with sysconfig

Part Number: AM6442
Other Parts Discussed in Thread: SYSCONFIG, SK-AM64B

Tool/software:

Hi,

I wonder about GPIO bank and pin interrupts and their configuration using sysconfig.

I successfully adapted the example

C:\ti\mcu_plus_sdk_am64x_10_00_00_20\examples\drivers\gpio\gpio_input_interrupt

to run on the SK-AM64B (changed IO pin to GPIO1_59 for user switch SW1).

Using ROUTER7 this generates INT39 on R5-0-0, sysconfig sets 0x000100B7 in the MAIN_GPIOMUX_INTROUTER0_CFG_INTR_ROUTER_CFG_INTR_MUXCNTL register at 0x00A00020, meaning source 183 (=B7) GPIO1 Bank 3. Example is programmed as bank interrupt.

ti/mcu_plus_sdk_am64x_10_00_00_20/docs/api_guide_am64x/DRIVERS_GPIO_PAGE.html explains bank and pin GPIO interrupts, but not how to configure the routing with or without sysconfig.

I have a similar example running, it uses GPIO0_36, ROUTER0, 0x00A00004 is set to 0x000100C0 (192 = C0, GPIO bank2). It is programmed as pin interrupt (#32 for router 0) _without_ the

/* Get and clear bank interrupt status */
intrStatus = GPIO_getBankIntrStatus(gGpioBaseAddr, bankNum);
GPIO_clearBankIntrStatus(gGpioBaseAddr, bankNum, intrStatus);

code - that _should_ be necessary for bank interrupts (see code below, adapted from the HTML page).

I also can change (in CCS register view) the Router MUXCNTL register 0x00A00004 to 0x00010024, the GPIO 36 pin interrupt number, and the interrupt continues to be triggered.

Somehow strange.

My questions:

Are there other differences between bank and pin interrupt _configuration_ than the MUXCNTL register setting? I did not found any. (Of course, bank triggers for any of the 16 pins, pin only for one.)

Why I have to enable bank interrupt to get the pin interrupt?

What's with the necessity to clear the bank interrupt? I did not see it.

How to configure a pin interrupt in sysconfig?

Thanks & regards

Frank

/* use GPIO PIN Macros from ti_drivers_config.h */
uint32_t gGpioBaseAddr = CONFIG_HSI_INT_BASE_ADDR;
uint32_t gGpioPinNum = CONFIG_HSI_INT_PIN;
uint32_t gGpioPinIntrNum = CONFIG_HSI_INT_INTR_NUM;

HwiP_Object ghsiHwiObject;

uint32_t hsi_intcnt = 0;


static void hsi_pinIsrFxn(void *args)
{
/*
* Handle pin interrupt - This is pulse interrupt. No need to clear status
*/
++hsi_intcnt;
}

void hsi_pin_interrupt_init(void)
{
int32_t retVal;
uint32_t pinNum = gGpioPinNum, bankNum;
HwiP_Params hwiPrms;

bankNum = GPIO_GET_BANK_INDEX(pinNum);

Board_gpioInit();
/* Interrupt setup */
GPIO_setDirMode(gGpioBaseAddr, pinNum, GPIO_DIRECTION_INPUT);
GPIO_setTrigType(gGpioBaseAddr, pinNum, GPIO_TRIG_TYPE_RISE_EDGE);
GPIO_bankIntrEnable(gGpioBaseAddr, bankNum);

/* Register pin interrupt */
HwiP_Params_init(&hwiPrms);
hwiPrms.intNum = gGpioPinIntrNum;
hwiPrms.callback = &hsi_pinIsrFxn;
hwiPrms.args = (void *)pinNum;
retVal = HwiP_construct(&ghsiHwiObject, &hwiPrms);
if(SystemP_SUCCESS != retVal)
{
DebugP_assert(FALSE);
}
}