[FAQ] AM62A7-Q1: SDIO driver strength change

Biao Li

Part Number: AM62A7-Q1
Other Parts Discussed in Thread: AM62A7

Tool/software:

Hi Expert,

Customer was doing EMC test, it was found that the EMMC CLOCK exceeded the standard by 10dB at 1.8GHz and 1.6GHz. Can the output strength capability of the EMMC CLOCK be adjusted by below register in the figure below?

BR,

Biao

13 days ago

0 guoqing wang 13 days ago

Prodigy 50 points

1. The one in the red box in the following figure comes from the section of EMMC registers. Is it possible to adjust the driving ability of signals such as EMMC clock in this place?

2. What does Sdhccore mean? How to understand?

0 peaves 13 days ago in reply to guoqing wang

TI__Guru 59815 points

The AM62A7 eMMC port was timing closed with the default drive strength. Therefore, we do not recommend changing the drive strength since this could introducing signal timing issues with the attached eMMC device.

Regards,
Paul

0 guoqing wang 11 days ago in reply to peaves

Prodigy 50 points

We already know that; We will only try to change the drive strength. Please help share how to change?

Thank you。

0 peaves 11 days ago in reply to guoqing wang

TI__Guru 59815 points

Currently, there are no plans to support drive strength changes on the AM62Ax device.

Regards,
Paul

0 guoqing wang 11 days ago in reply to peaves

Prodigy 50 points

Are there any suggestions to solve the problem of EMC-RE exceeding the standard caused by EMMC CLOCK?

0 peaves 10 days ago in reply to guoqing wang

TI__Guru 59815 points

You should investigate your PCB layout to determine why this signal is radiating. This typically occurs when there is a PCB trace impedance discontinuity, which also introduces signal distortion.

Regards,
Paul

0 guoqing wang 10 days ago in reply to peaves

Prodigy 50 points

What does Sdhccore mean? How to understand?

0 guoqing wang 10 days ago in reply to guoqing wang

Prodigy 50 points

0 peaves 10 days ago in reply to guoqing wang

TI__Guru 59815 points

This appears to be a reference to the MMCSD host controller, where it has the capability of changing the drive strength of output buffer to be one of the values defined in the eMMC standard. The output buffers being used to implement the AM62Ax eMMC port does not support all of the drive strengths defined in the eMMC standard. Therefore, the host controller drive strength control function is not implemented. The registers are there, but they have no impact on drive strength. The output buffer drive strength is fixed to 40 ohms.

Regards,
Paul

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[FAQ] AM62A7-Q1: SDIO driver strength change