Other Parts Discussed in Thread: AM3703
Hi all,
I have a doubt regarding LCD display interfacing with AM3703.
In OMAP to AM37x migration guide from TI wiki, it is mentioned that
"Backward compatibility is maintained if your pixel clock on DSS interface is <= 60 MHz. But if your pixel clock is higher, 60< PCLK <= 75 MHz, you would need to use the High Speed Mode pinmux scheme. For all new AM37x designs, High Speed Mode pinmux scheme should be used."
I hereby attached the link for your reference
http://processors.wiki.ti.com/index.php/OMAP35x_To_AM37x_Hardware_Migration_Guide
In our design, we may have a resolution of 640 x 480 or 1024 x 768 which will be having a display PCLK less than 60 or greater than 60.
I am little bit confused about the statement given in TI WIKI. Do I need to dynamically change the display data pin mux ing according to PCLK?
Or, If I had set 60 MHz <= PCLK <=75 MHz pin muxing, will it work for all cases (i.e lesser than 60 MHz or greater than 60 MHz)?
Kindly clarify me.
With regards,
Karthik R