AM62A7: [C7x] How get interrupt number and event id for c75 ipc

Tool/software:

Dear supporter,

I enabled IPC for C7x and saw it used gIpcNotifyInterruptConfig_c75ss0_0 in ipc_notify_v0_cfg.c which is :

IpcNotify_InterruptConfig gIpcNotifyInterruptConfig_c75ss0_0[IPC_NOFTIY_INTERRUPT_CONFIG_C75SS0_0_NUM] = {
    {
        .intNum = 59U, /* interrupt line on C75SS0_0 CPU */
        .eventId = 192, /* CSL int num + CLEC SOC offset */
        .numCores = 1U, /* number of cores that send messages which tied to this interrupt line */
        .coreIdList = { /* core ID's tied to this interrupt line */
        CSL_CORE_ID_MCU_R5FSS0_0
        },
    },
    {
        .intNum = 60U, /* interrupt line on C75SS0_0 CPU */
        .eventId = 193, /* CSL int num + CLEC SOC offset */
        .numCores = 1U, /* number of cores that send messages which tied to this interrupt line */
        .coreIdList = { /* core ID's tied to this interrupt line */
        CSL_CORE_ID_A53SS0_0
        },
    },
    {
        .intNum = 62U, /* interrupt line on C75SS0_0 CPU */
        .eventId = 195, /* CSL int num + CLEC SOC offset */
        .numCores = 1U, /* number of cores that send messages which tied to this interrupt line */
        .coreIdList = { /* core ID's tied to this interrupt line */
        CSL_CORE_ID_R5FSS0_0
        },
    },
};

I checked the interrupt table in TRM, and saw the interrupt line seems to be different:

C7X256V0_CLEC_GIC_SPI_IN_76  Cluster0
C7X256V0_CLEC_GIC_SPI_IN_77  Cluster1
C7X256V0_CLEC_GIC_SPI_IN_108  Cluster2
C7X256V0_CLEC_GIC_SPI_IN_109  Cluster3

1. Could you please help me verify how .intNum and eventId in above struct were calculate? 

2. CLEC_SOC_INT_START is 192. Where can I find such information in document?

Thank you and best regards,

Jack