TDA4VM: transfer data between main2_1 and mcu1_0

Hello,

Other than IPC we don't have documentation on inter core communication .For larger data size , you can reserve a section of memory in DDR and configure the section in MPU configuration. Under Lying vision apps frame work does the same for huge chunk of data transfer.

No readily available API you can use other than IPC.

Regards

Tarun Mukesh

Hi expert,

    i've reserve a section in DDR in MCU1_0  region is 0xA020xxxx, and get it's address from map file. then in main2_1 core, i write data via pointer. result is, it can only write value 1~2 times, then MCU1_0 read values not changed any more.

also, i tried 0x7004000, 0xb0000000, result is same. no error, but value read from mcu1_0 no update. while main2_1 change byte0,1 every 0.5 second.

[18:04:31.696]收←◆mcu1_0: 1-70000000...01 03 12 13 14 15 16
[18:04:32.696]收←◆mcu1_0: 2-70000000...01 03 12 13 14 15 16
[18:04:33.696]收←◆mcu1_0: 3-70000000...01 03 12 13 14 15 16
[18:04:34.696]收←◆mcu1_0: 4-70000000...07 09 12 13 14 15 16
[18:04:35.696]收←◆mcu1_0: 5-70000000...07 09 12 13 14 15 16
[18:04:36.696]收←◆mcu1_0: 6-70000000...07 09 12 13 14 15 16
[18:04:37.696]收←◆mcu1_0: 7-70000000...07 09 12 13 14 15 16
[18:04:38.696]收←◆mcu1_0: 8-70000000...03 05 12 13 14 15 16
[18:04:39.696]收←◆mcu1_0: 9-70000000...03 05 12 13 14 15 16
[18:04:40.696]收←◆mcu1_0: 10-70000000...03 05 12 13 14 15 16
[18:04:41.696]收←◆mcu1_0: 11-70000000...03 05 12 13 14 15 16
[18:04:42.696]收←◆mcu1_0: 12-70000000...0B 0D 12 13 14 15 16
[18:04:43.696]收←◆mcu1_0: 13-70000000...01 03 12 13 14 15 16
[18:04:44.696]收←◆mcu1_0: 14-70000000...01 03 12 13 14 15 16
[18:04:45.696]收←◆mcu1_0: 15-70000000...05 07 12 13 14 15 16
[18:04:46.696]收←◆mcu1_0: 16-70000000...05 07 12 13 14 15 16
[18:04:47.696]收←◆mcu1_0: 17-70000000...05 07 12 13 14 15 16
[18:04:48.696]收←◆mcu1_0: 18-70000000...05 07 12 13 14 15 16
[18:04:49.696]收←◆mcu1_0: 19-70000000...05 07 12 13 14 15 16
[18:04:50.696]收←◆mcu1_0: 20-70000000...05 07 12 13 14 15 16
[18:04:51.696]收←◆mcu1_0: 21-70000000...05 07 12 13 14 15 16
[18:04:52.696]收←◆mcu1_0: 22-70000000...05 07 12 13 14 15 16

     my question is:

1.  who should create the reserve ram,  MCU1_0, or main2_1?

2.  which file to config mpu? i check `sdk_rtos_0900/vision_apps/platform/j721e/rtos/mcu2_1/j721e_mpu_cfg.c`, and other mpu config file, it's all with '

thanks.

Hello,

ui he said:

've reserve a section in DDR in MCU1_0  region is 0xA020xxxx, and get it's address from map file. then in main2_1 core, i write data via pointer. result is, it can only write value 1~2 times, then MCU1_0 read values not changed any more.

You mentioned you have reserved addressed , may i know how did you reserve a section ? How did you ensure you read from MCU1_0 after MAIN2_1 wrote, have you implemented any lock mecahnism.

Both core should reserve the memory section in their respective cores .

We usually have r5_mpu_freertos.c file for freertos configuration . You need to follow similar procedure of how  0xAA000000 has been created and used.

Regards

Tarun MUkesh

Tarun Mukesh Puvvada said:

You mentioned you have reserved addressed , may i know how did you reserve a section ? How did you ensure you read from MCU1_0 after MAIN2_1 wrote, have you implemented any lock mecahnism.

currently, i alloc spaces from mcu2_1,  Currently, I have repurposed the end of the DDR_MCU2_1 region for shared memory.

sdk_rtos_0900/vision_apps/platform/j721e/rtos/mcu2_1/linker_mem_map.cmd

    DDR_MCU2_1               ( RWIX ) : ORIGIN = 0xA4100400 , LENGTH = 0x01EFEC00  // reduce 4K

    /* DDR for MCU2_1 share memory  */
    USS_MCU2_1                        : ORIGIN = 0xA5FFF000 , LENGTH = 0x01000



sdk_rtos_0900/vision_apps/platform/j721e/rtos/mcu2_1/j721e_linker_freertos.cmd
    .uss_share         : {} align(4)       > USS_MCU2_1


sdk_rtos_0900/vision_apps/platform/j721e/rtos/mcu2_1/main.c
   uint8_t  gUssSharedMem[128]  __attribute__((section(".uss_share") ))  = {0};

for data sync, i didn't implement it, since i only write in mcu21 and read in mcu10,   in mcu21 it write seq value every 0.5 sec, and read it in mcu10 every 1 sec. the value corret or not is not important since no sync method(it can be done later), what i care is if value read in mcu10 is changed. 

sdk_rtos_0900/vision_apps/platform/j721e/rtos/mcu2_1/main.c
write data:

    uint8_t *pUss = &gUssSharedMem[0]; 
    while(1)
    {
        pUss[0] = idx;
        idx += 1;
        appLogWaitMsecs(500u);
    }

read data:
sdk_rtos_0900/mcusw/mcuss_demos/profiling/can/APA5/SystemFile/main_task.c

volatile uint8_t  *ussRxbuf = (volatile uint8_t *)(0xa5fff000);
void UPA_Task(void*  a0, void*  a1)
{
    while(RunUPATask)
    {
        AppUtils_Printf(TRUE, "mcu1_0: %d-%08x...%02X %02X %02X %02X %02X %02X %02X\n", cnt,
        &ussRxbuf[0],
        ussRxbuf[0],ussRxbuf[1],ussRxbuf[2],ussRxbuf[3],ussRxbuf[4],ussRxbuf[5],ussRxbuf[6],ussRxbuf[7]
        );
        SemaphoreP_pend(UPAHande, 1000);

    }
}

Tarun Mukesh Puvvada said:

We usually have r5_mpu_freertos.c file for freertos configuration . You need to follow similar procedure of how  0xAA000000 has been created and used.

if data not change issue is a cached problem, is it also need to be config in mcu21 side,  which file is "sdk_rtos_0900/vision_apps/platform/j721e/rtos/mcu2_1/j721e_mpu_cfg.c",   how to determine mpu config shoud be config in mcu10 or mcu21?

thanks.