Hello,

Bruce xu said:

the current method used is to use devmem2 tool to modify the registers directly

Can you please list the exact steps you are following here?

Thanks,

Prashant

Hi,

    The current command we are using is:   devmem2  0x682088 w 0x800f

But I can't find the definition of this register in the AM62P datasheet, this is just a suggestion given by your colleague to let configure this register。

I hope you can provide some suggestions on how we can configure the emmc frequency in the boot or kernel code.

Regards

Hello,

Could you please try the following patches to reduce the eMMC frequency to 125MHz?

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index f8915d7a9c6b..796329c41d7d 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -612,6 +612,7 @@ sdhci0: mmc@fa10000 {
                clock-names = "clk_ahb", "clk_xin";
                assigned-clocks = <&k3_clks 57 2>;
                assigned-clock-parents = <&k3_clks 57 4>;
+               assigned-clock-rates = <125000000>;
                bus-width = <8>;
                mmc-ddr-1_8v;
                mmc-hs200-1_8v;

diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
index 1062f9d62b05..5e89e4b8de01 100644
--- a/drivers/mmc/host/sdhci_am654.c
+++ b/drivers/mmc/host/sdhci_am654.c
@@ -641,7 +641,8 @@ static struct sdhci_ops sdhci_j721e_8bit_ops = {
 
 static const struct sdhci_pltfm_data sdhci_j721e_8bit_pdata = {
        .ops = &sdhci_j721e_8bit_ops,
-       .quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
+       .quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 |
+                 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
        .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 };

Regards,

Prashant

Hi Prashant,

Can change eMMC to arbitrary frequency in this way?

No Tony, it has to be to a frequency which its PLL or the divider allows.