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Investigating the OMAP-L132... Some questions.

DT
Intellectual 510 points
Other Parts Discussed in Thread: OMAP-L132, OMAP-L138

Hi,

I'm currently investigating the OMAP-L132 for a potential custom board that will acquire samples (2ch, 16bits, 2.5MHz each), process the data (FFTs, signal conditioning) and/or forward the steam to a host using Ethernet for host processing instead of embedded processing.

I read some documentation and didn't find anything about the Ethernet TCP/IP stack in SYS/BIOS. I've read "Starterware" somewhere, but it looks like it's OS-less, which doesn't fit my needs. I've also investigated how I would connect my A/D to the OMAP and found some info. So my questions are:

- For a project like mine, should I use SYS/BIOS (or Linux??)

- Is there a TCP/IP Stack in SYS/BIOS and if not, how can I send my data?

- How should I connect my A/Ds to the OMAP if I want to use the EDMA advantages? The A/D we currently use is 16bits parallel.

 

I'm planning to order the EVAL board soon enough, but wanted to resolved my questions before. Oh one more, does the EVAL board comes with schematics? This really helps in developing custom boards.

Thanks community!

  • 0
    Intellectual 510 points

    oh and I forgot one question... why is the OMAP-L132 really rare from distributors? In Canada, it looks like it's nowhere to be found.

    Regards,

    DT

  • 0 in reply to DT
    Intellectual 510 points

    Anyone with some thoughts on my questions?

  • 0 in reply to DT
    TI__Guru 54422 points

    1) SYS/BIOS should be appropriate for your system.

    2) The NDK is available for both DSP/BIOS and SYS/BIOS. You can find the download info here:

    http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/ndk/index.html

    3) The UPP peripheral is well suited to interfacing to an A/D but is not available on the OMAP-L132 (it's on OMAP-L138 which is a superset of OMAP-L132.)  Another choice is to use an FPGA to buffer samples from the A/D, and use the DSP's External Memory Interface to read the FPGA FIFO based on an event provided by the FPGA to the DSP.

    Regards
    Kyle

  • 0 in reply to kcastille
    Intellectual 510 points

    Hi Kyle!

    thanks for the reply. I'll look into it.

    For 3), yes we are currently doing this (FPGA being the FIFO and being accessed by another microcontroller's memory interface). Thanks for the suggestion for the UPP and it's good to know that the L132 doesn't have it. I think we will use the L138 for high-end models (using the UPP) and use a SPI A/D chip for low-end to communicate with the L132.

    UPP and SPI works with DMA right?

    Any advice on hardware design if I plan to use L132 and L138? I would like to make one design as close as possible to the other one for "time-to-market" purpose.

    Thanks!

  • 0 in reply to DT
    TI__Mastermind 27585 points

    The L138 and L132 are pin for pin compatible, meaning you could design the board for L138 and drop in a L132 instead for the lower end models, unpopulating the unnecessary components.

    Jeff