Tool/software:
Dear Sitara champs,
Recently a drift of the system time has been identified on an AM3352 based product.
When starting the AM3352 the following log is shown when executing dmesg :
[ 0.000000] OMAP clockevent source: timer2 at 19200000 Hz
[ 0.000000] sched_clock: 32 bits at 19MHz, resolution 52ns, wraps every 223696ms
[ 0.000000] OMAP clocksource: timer1 at 19200000 Hz
The quartz frequency has been measured at 24MHz
We understand that when booting the AM3352 considers that the quartz is 19.2MHz, which makes the internal time drift …
To solve such issue, is it possible to force 24MHz value when the processor starts ?
Furthermore, how long should the reset signal be forced to low when booting the AM3352?
Thank you!
Best regards,
Guillaume