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How to get started with IPC MessageQ example

Steph
Intellectual 260 points

Hi,

 

I am trying to run the message_q sample project provided by ccs 4.2 on my DM816x but am not sure how to start. Here's what I have done.

 

I am using the gel file I downloaded from here :

http://e2e.ti.com/support/embedded/f/355/p/138645/516986.aspx#516986

 

I am running everything on my windows machine, and in CCS 4, I created 3 a projects, one for the DSP, one for Video-M3, one for VPSS-M3. For the Video-M3 and VPSS-M3 projects, by default,  under CCS Debug, the Debugger selection is : Connect to first compatible CPU. I am not sure if this is correct or not, or are there specific CPUs I should be connecting to. I then made the Video-M3 and VPSS-M3 projects as reference projects to my DSP project and tried to debug the DSP project. The program enters Ipc_Start and never returns. I saw that another person has the same problem, and that was because of the gel file. I was hoping the gel file I downloaded above would solve the problem, it did not. 

Am I missing any steps in my setup? Do I have to do something special to the cortex M3?  I noticed my targets :

CortexM3_RTOS_0 is in reset, but I am not sure what it is. There is also the CortexM3_secSS_0, which is not in reset, but I am not sure what it is either.

Do I have to do anything on the Linux side?

Any suggestions would be greatly appreciated.

Thanks,

-s

 

 

  • 0
    TI__Mastermind 32475 points

    Steph,

    The gel file for the posts that you mention above works only if you have a evm board with DDR3.

    Do you know if you have DDR3 or DDR2 board?  For DDR2 board you can try the following attached file:

    5710.ti816x_ddr2.gel.txt

    Judah

  • 0 in reply to judahvang
    Intellectual 260 points

    Hi Judah,

    I believe I have a DDR3 board. Is there a way to verify?  I tried the gel file for the DDR2 board, but got the same result.

    Thanks,

    Steph

     

  • 0 in reply to Steph
    Intellectual 260 points

    Hi Judah,

     

    Actually, I tried debugging with the DDR2 gel file again,and I got an error :

    C674X_0: File Loader: Data verification failed at address 0x8001FCB0 Please verify target memory and memory map.

    Error found during data verification.

    Ensure the linker command file matches the memory map.

     

    Thanks,

    Steph

  • 0 in reply to Steph
    TI__Mastermind 32475 points

    Steph,

    I don't know how to verify whether its DDR3 or DDR2.  If you board is pretty recent I believe its got DDR3.  DDR2 was there for older boards.

    Can you try attaching your executables here...all 3 of them and please specify which is to be loaded on which core.

    Judah

  • 0 in reply to judahvang
    Intellectual 260 points

    Hi Judah,

     

    The board is pretty recent, we probably got it in August this year.

    I guess that's another question I have. I do not know how to load the .outs into specific cores, or which core exactly. Both Video-M3 and VPSS-M3 are 'M3', but does it mean I have to specify the CPU to be CortexM3_secSS_0? 

     

    Here are the .outs :

     

    For DSP :

    4885.gy.txt

     

    For VPSS-M3

    4212.gy_vpss_m3.txt

     

    For Video-M3

    1307.gy_video_m3.txt

     

    Thanks a lot!

    Steph

     

  • 0 in reply to Steph
    TI__Mastermind 32475 points

    Steph,

    Just tried your 3 executables and they work on my board so I don't think its an issue with the programs.  Its definitely an environment thing.  You probably need good gel files, or the right CCS version.  I'm pretty sure the last gel file that was attached on the other thread should work for you.  What CCS version do you have?

    Video-M3 corresponds to the RTOS_0 in CCS

    VPSS-M3 corresponds to the ISS_0 in CCS

    Judah

  • 0 in reply to judahvang
    Intellectual 260 points

    Judah,

     

    I am using CCS 4.2.

    Will there be any hardware switches on the board that might block IPC_start? Also, through the GEL script, I ran Ducati, CortexM3_0, CortexM3_1, and C674x in the CPU bringups. Are there anything else that I have to run first?

    Also, what is the procedure for running the programs? Right now, all I do is set the DSP project as active project and try to debug that project. Is this the correct way of doing it?

     

    Thanks,

    Steph

     

  • 0 in reply to Steph
    TI__Mastermind 32475 points

    Steph,

    I'm not an expert on this evm board so I don't know about any sort of switches on it.  I know that for some who have booted linux on the board, you might have to do something a bit different.

    All the speak of Gel files is for the Cortex A8.  You should always connect to the Cortex A8 first.  It should automatically execute the gel file.  After this, you should be able to connect to the other 3 cores.  After connecting to the cores, you should be able to load their respective executables.  After loading the programs, you should be able to run each one in any order [it does not matter which core you run first or last].

    It doesn't matter which project is the active project.  You are loading the different cores with different executables and running the 3 cores.  The A8 is not used in your scenario which is fine, but as I mentioned, you need to connect to this core first and it will execute the gel file.  The other 3 cores do not execute any gel files.

    Judah

  • 0 in reply to judahvang
    Intellectual 260 points

    Judah,

     

    Thanks a lot.  I was not aware I had to load each executable one by one to each of the cores and was assuming they will be loaded after I started debugging one of the projects. Everything works now!

     

    Thanks for all your help!

    Steph