AM6442: U-Boot MMC_HS_52 Mode eMMC

Part Number: AM6442
Other Parts Discussed in Thread: TMDS64EVM

Tool/software:

I am working with a customer trying to get their eMMC working with AM64x in U-Boot in MMC_HS_52 mode (High Speed 52MHz). They are experiencing some difficulty in this matter. They are working with Processor-SDK-Linux 9.00.00.03. We are aware that there have been a number of small but possibly important MMC changes between 9.00.00.03 and the latest 10.01.10.04 SDK version. We have in fact analyzed some of those differences, particularly the device tree differences in k3-am64-main.dtsi. While it may be a good idea to update to a newer SDK version, and the customer may do so anyways at some point, it is a bit more to take on than they wish at the moment. If possible, we need a near term solution on SDK version 9.00.00.03.

First off, we believe we have found a critical bug in am654_sdhci.c, which remains present in the latest 10.01.10.04 SDK. The "static const struct timing_data td[]" structure has an entry for MMC_HS with a typo. Instead of ti,itap-del-sel-mms-hs, we believe it should be ti,itap-del-sel-mmc-hs. This typo does not effect us, but it makes us wonder if all of the different modes in the table have indeed been testes.

The second thing we notice is that MMC_HS_52 mode is completely missing from the "td[]" table. Can this mode be supported by adding it to the table along with the necessary device tree entries?

In AM654_sdhci.c:

MMC_HS_52 = {"NULL, ti,itap-del-sel-mmc-hs52, MMC_CAP(MMC_HS_52)}

In device tree:

ti,itap-del-sel-mmc-hs52 = <0xa>

I believe the omission of an "otap" entry sets the OTAPDLYEN to 0. Please confirm.

Values taken from the following table:

Something else that is a bit confusing is the the correct value for the HIGH_SPEED_ENA field found in the MMCSD0_HOST_CONTROL1 register. With this bit clear, the signal timing to match Figure 6-61 below. If this bit is set high, then the data starts transitioning at the positive edge of the clock.

Here is an excerpt out of the TRM:

Which seems to contradict the expected Figure 6-61 timing diagram from the datasheet by recommending it to be set in MMC_HS_52 mode, thus moving the data transition to the positive clock edge. What is the correct setting of this bit in MMC_HS_52 mode? U-boot seems to be following the TRM interpretation.

If using MMC_HS_52, which I think complies with Table 6-73 (if you ignore the 52 and treat it as 50; 50 MHz is what is seen on the scope), then u-boot sets the HIGH_SPEED_ENA bit. This causes a positive edge launch and breaks timing (at least with the OTAPDLYENA = 0 that the datasheet recommends).

Lastly, the customer does appear to have gotten MMC_DDR_52 mode to work. Validation is ongoing. They may end up just using the MMC_DDR_52 mode. However, they do not require the added bandwidth, and were planning to stick to MMC_HS_52 mode for added design margin.

Thanks,

Stuart

  • Hi, I will check internally about these inconsistencies & get back to you.

  • Hi,

    eMMC working with AM64x in U-Boot in MMC_HS_52 mode (High Speed 52MHz). They are experiencing some difficulty in this matter.

    Can you please clarify what exactly is the difficulty here? Is there a U-Boot failure in this mode? If so, could you please share the boot logs.

    Thanks, Prashant

  • Prashant,

    I've discussed this with the customer. Customer is going to:

    1. make the U-Boot modifications I suggested in my initial E2E post
    2. Capture U-Boot logs
    3. Capture scope waveform

    In the meantime:

    1. can you confirm that my suggested U-Boot changes are correct to add support for MMC_HS_52?
    2. can you confirm the correct setting for HIGH_SPEED_ENABLE for MMC_HS_52 mode?

    Thanks,

    Stuart

  • Yes to both the queries.

    The following patch should enable the MMC_HS_52 mode & accordingly set the HIGH_SPEED_ENABLE bit:

    diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
    index e17ea49e790..5879bb82bb2 100644
    --- a/arch/arm/dts/k3-am64-main.dtsi
    +++ b/arch/arm/dts/k3-am64-main.dtsi
    @@ -633,10 +633,12 @@
     		ti,trm-icp = <0x2>;
     		ti,otap-del-sel-legacy = <0x0>;
     		ti,otap-del-sel-mmc-hs = <0x0>;
    -		ti,otap-del-sel-ddr52 = <0x6>;
    -		ti,otap-del-sel-hs200 = <0x7>;
    +		ti,otap-del-sel-mmc-hs52 = <0x0>;
    +		// ti,otap-del-sel-ddr52 = <0x6>;
    +		// ti,otap-del-sel-hs200 = <0x7>;
     		ti,itap-del-sel-legacy = <0x10>;
     		ti,itap-del-sel-mmc-hs = <0xa>;
    +		ti,itap-del-sel-mmc-hs52 = <0xa>;
     		ti,itap-del-sel-ddr52 = <0x3>;
     		status = "disabled";
     	};
    diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
    index 8f109553974..66d5afa49f9 100644
    --- a/drivers/mmc/am654_sdhci.c
    +++ b/drivers/mmc/am654_sdhci.c
    @@ -127,6 +127,9 @@ static const struct timing_data td[] = {
     	[MMC_HS]	= {"ti,otap-del-sel-mmc-hs",
     			   "ti,itap-del-sel-mms-hs",
     			   MMC_CAP(MMC_HS)},
    +	[MMC_HS_52]	= {"ti,otap-del-sel-mmc-hs52",
    +			   "ti,itap-del-sel-mmc-hs52",
    +			   MMC_CAP(MMC_HS_52)},
     	[SD_HS]		= {"ti,otap-del-sel-sd-hs",
     			   "ti,itap-del-sel-sd-hs",
     			   MMC_CAP(SD_HS)},
    @@ -387,6 +390,7 @@ static void am654_sdhci_write_b(struct sdhci_host *host, u8 val, int reg)
     		 */
     		case SD_HS:
     		case MMC_HS:
    +		case MMC_HS_52:
     		case UHS_SDR12:
     		case UHS_SDR25:
     			val &= ~SDHCI_CTRL_HISPD;
    

  • Prashant,

    Customer has patched their U-Boot with the following changes...

    Device Tree:

    &sdhci0 {
         /* emmc */
         bus-width = <8>;
         non-removable;
         ti,driver-strength-ohm = <50>;
         disable-wp;
    ti,clkbuf-sel = <0x7>;
    ti,itap-del-sel-mmc-hs52 = <0xa>;
    ti,otap-del-sel-mmc-hs52 = <0x0>;
         /* deleting higher speed otaps-del-sel, so they are not selected */ 
         /delete-property/ ti,otap-del-sel-ddr52;
         /delete-property/ ti,otap-del-sel-hs200;
    };

    Edits to am654_sdhc.c:

    Added print statements to sdhci.c to decode the error returns and print the register that has the error bit:

    Lastly, turned on MMC_TRACE in kconfig. Here is the log, the mmc write command is isued in line 363 of the log. The Trace error messages begin at line 484:

    u-boot-log_emmc_write_error.txt
    U-Boot SPL 2023.04-g89136b9d-dirty (Jan 13 2025 - 14:25:49 -0600)
    Resetting on cold boot to workaround ErrataID:i2331
    Please resend tiboot3.bin in case of UART/DFU boot
    resetting ...
    
    U-Boot SPL 2023.04-g89136b9d-dirty (Jan 13 2025 - 14:25:49 -0600)
    SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.5--v09.00.05 (Kool Koala)')
    SPL initial stack usage: 13376 bytes
    Trying to boot from MMC2
    Authentication passed
    Authentication passed
    Authentication passed
    Authentication passed
    Loading Environment from MMC... *** Warning - bad CRC, using default environment
    
    Starting ATF on ARM64 core...
    
    NOTICE:  BL31: v2.8(release):v2.8-226-g2fcd408bb3-dirty
    NOTICE:  BL31: Built : 00:42:57, Jan 13 2023
    I/TC:
    I/TC: OP-TEE version: 3.20.0 (gcc version 11.3.0 (GCC)) #1 Fri Jan 20 15:42:54 UTC 2023 aarch64
    I/TC: WARNING: This OP-TEE configuration might be insecure!
    I/TC: WARNING: Please check https://urldefense.com/v3/__https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html__;!!G3vK!QBwlgOnBeFYc0lr3BA0lfL01hqD0yTo4IEseoLEgydDRGWKboj8LT7xE5ovjhjxP-12Ahmegom4eXo0JMJJR6sm0mzxS$ 
    I/TC: Primary CPU initializing
    I/TC: SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.5--v09.00.05 (Kool Koala)')
    I/TC: HUK Initialized
    I/TC: Activated SA2UL device
    I/TC: Enabled firewalls for SA2UL TRNG device
    I/TC: SA2UL TRNG initialized
    I/TC: SA2UL Drivers initialized
    I/TC: Primary CPU switching to normal world boot
    
    U-Boot SPL 2023.04-g89136b9d-dirty (Jan 13 2025 - 14:26:04 -0600)
    SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.5--v09.00.05 (Kool Koala)')
    Trying to boot from MMC2
    CMD_SEND:0
                    ARG                      0x00000000
                    MMC_RSP_NONE
    CMD_SEND:8
                    ARG                      0x000001aa
                    MMC_RSP_R1,5,6,7         0x000001aa
    CMD_SEND:55
                    ARG                      0x00000000
                    MMC_RSP_R1,5,6,7         0x00000120
    CMD_SEND:41
                    ARG                      0x40300000
                    MMC_RSP_R3,4             0x00ff8000
    CMD_SEND:55
                    ARG                      0x00000000
                    MMC_RSP_R1,5,6,7         0x00000120
    CMD_SEND:41
                    ARG                      0x40300000
                    MMC_RSP_R3,4             0xc0ff8000
    CMD_SEND:2
                    ARG                      0x00000000
                    MMC_RSP_R2               0x58444444
                                             0x44494e43
                                             0x606d7993
                                             0xfd015800
    
                                            DUMPING DATA
                                            000 - 58 44 44 44
                                            004 - 44 49 4e 43
                                            008 - 60 6d 79 93
                                            012 - fd 01 58 00
    CMD_SEND:3
                    ARG                      0x00000000
                    MMC_RSP_R1,5,6,7         0x50480500
    CMD_SEND:9
                    ARG                      0x50480000
                    MMC_RSP_R2               0x400e0032
                                             0x5b590000
                                             0x1ce67f80
                                             0x0a400000
    
                                            DUMPING DATA
                                            000 - 40 0e 00 32
                                            004 - 5b 59 00 00
                                            008 - 1c e6 7f 80
                                            012 - 0a 40 00 00
    CMD_SEND:7
                    ARG                      0x50480000
                    MMC_RSP_R1,5,6,7         0x00000700
    CMD_SEND:55
                    ARG                      0x50480000
                    MMC_RSP_R1,5,6,7         0x00000920
    CMD_SEND:51
                    ARG                      0x00000000
                    MMC_RSP_R1,5,6,7         0x00000920
    CMD_SEND:6
                    ARG                      0x00fffff1
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:55
                    ARG                      0x50480000
                    MMC_RSP_R1,5,6,7         0x00000920
    CMD_SEND:6
                    ARG                      0x00000002
                    MMC_RSP_R1,5,6,7         0x00000920
    CMD_SEND:6
                    ARG                      0x80fffff1
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x00000000
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x00000000
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x00000000
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x00000080
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x00000080
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:18
                    ARG                      0x00004080
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:12
                    ARG                      0x00000000
                    MMC_RSP_R1b              0x00000b00
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:18
                    ARG                      0x000006d6
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:12
                    ARG                      0x00000000
                    MMC_RSP_R1b              0x00000b00
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x0000a3f0
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x00000080
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:18
                    ARG                      0x00004080
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:12
                    ARG                      0x00000000
                    MMC_RSP_R1b              0x00000b00
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:18
                    ARG                      0x000006d6
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:12
                    ARG                      0x00000000
                    MMC_RSP_R1b              0x00000b00
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:18
                    ARG                      0x000006ee
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:12
                    ARG                      0x00000000
                    MMC_RSP_R1b              0x00000b00
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:18
                    ARG                      0x0000a3f0
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:12
                    ARG                      0x00000000
                    MMC_RSP_R1b              0x00000b00
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x0000aa69
                    MMC_RSP_R1,5,6,7         0x00000900
    Authentication passed
    Authentication passed
    
    
    U-Boot 2023.04-g370653d3-dirty (Jan 22 2025 - 10:08:38 -0600)
    
    SoC:   AM64X SR2.0 HS-FS
    Model: Texas Instruments AM642 EVM
    DRAM:  1 GiB
    Core:  60 devices, 25 uclasses, devicetree: separate
    MMC:   mmc@fa10000: 0, mmc@fa00000: 1
    Loading Environment from FAT... selected_mode:0 val:0
    selected_mode:0 val:0
    selected_mode:0 val:0
    CMD_SEND:0
                    ARG                      0x00000000
                    MMC_RSP_NONE
    CMD_SEND:8
                    ARG                      0x000001aa
                    MMC_RSP_R1,5,6,7         0x000001aa
    CMD_SEND:55
                    ARG                      0x00000000
                    MMC_RSP_R1,5,6,7         0x00000120
    CMD_SEND:41
                    ARG                      0x40300000
                    MMC_RSP_R3,4             0x00ff8000
    CMD_SEND:55
                    ARG                      0x00000000
                    MMC_RSP_R1,5,6,7         0x00000120
    CMD_SEND:41
                    ARG                      0x40300000
                    MMC_RSP_R3,4             0xc0ff8000
    CMD_SEND:2
                    ARG                      0x00000000
                    MMC_RSP_R2               0x58444444
                                             0x44494e43
                                             0x606d7993
                                             0xfd015800
    
                                            DUMPING DATA
                                            000 - 58 44 44 44
                                            004 - 44 49 4e 43
                                            008 - 60 6d 79 93
                                            012 - fd 01 58 00
    CMD_SEND:3
                    ARG                      0x00000000
                    MMC_RSP_R1,5,6,7         0x50480500
    CMD_SEND:9
                    ARG                      0x50480000
                    MMC_RSP_R2               0x400e0032
                                             0x5b590000
                                             0x1ce67f80
                                             0x0a400000
    
                                            DUMPING DATA
                                            000 - 40 0e 00 32
                                            004 - 5b 59 00 00
                                            008 - 1c e6 7f 80
                                            012 - 0a 40 00 00
    CMD_SEND:7
                    ARG                      0x50480000
                    MMC_RSP_R1,5,6,7         0x00000700
    CMD_SEND:55
                    ARG                      0x50480000
                    MMC_RSP_R1,5,6,7         0x00000920
    CMD_SEND:51
                    ARG                      0x00000000
    selected_mode:0 val:18
                    MMC_RSP_R1,5,6,7         0x00000920
    CMD_SEND:6
                    ARG                      0x00fffff1
    selected_mode:0 val:18
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:55
                    ARG                      0x50480000
                    MMC_RSP_R1,5,6,7         0x00000920
    CMD_SEND:6
                    ARG                      0x00000002
                    MMC_RSP_R1,5,6,7         0x00000920
    selected_mode:0 val:1a
    CMD_SEND:6
                    ARG                      0x80fffff1
    selected_mode:0 val:1a
                    MMC_RSP_R1,5,6,7         0x00000900
    selected_mode:2 val:1a
    CMD_SEND:55
                    ARG                      0x50480000
                    MMC_RSP_R1,5,6,7         0x00000920
    CMD_SEND:13
                    ARG                      0x00000000
    selected_mode:2 val:1a
                    MMC_RSP_R1,5,6,7         0x00000920
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x00000000
    selected_mode:2 val:1a
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x00000080
    selected_mode:2 val:1a
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x00000000
    selected_mode:2 val:1a
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x00000080
    selected_mode:2 val:1a
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:18
                    ARG                      0x00004080
    selected_mode:2 val:1a
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:12
                    ARG                      0x00000000
                    MMC_RSP_R1b              0x00000b00
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:18
                    ARG                      0x000006d6
    selected_mode:2 val:1a
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:12
                    ARG                      0x00000000
                    MMC_RSP_R1b              0x00000b00
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:18
                    ARG                      0x000049d8
    selected_mode:2 val:1a
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:12
                    ARG                      0x00000000
                    MMC_RSP_R1b              0x00000b00
    OK
    In:    serial@2800000
    Out:   serial@2800000
    Err:   serial@2800000
    Net:   eth1: ethernet@8000000port@2
    Hit any key to stop autoboot:  0
    =>
    =>
    => mw ${loadaddr} aa55aa55 200
    => mmc write ${loadaddr} 55 1
    selected_mode:0 val:0
    selected_mode:0 val:0
    selected_mode:0 val:0
    CMD_SEND:0
                    ARG                      0x00000000
                    MMC_RSP_NONE
    CMD_SEND:8
                    ARG                      0x000000aa
                    RET                      -110
    CMD_SEND:55
                    ARG                      0x00000000
                    RET                      -110
    CMD_SEND:0
                    ARG                      0x00000000
                    MMC_RSP_NONE
    CMD_SEND:1
                    ARG                      0x00000000
                    MMC_RSP_R3,4             0x00ff8080
    CMD_SEND:1
                    ARG                      0x40000080
                    MMC_RSP_R3,4             0xc0ff8080
    CMD_SEND:2
                    ARG                      0x00000000
                    MMC_RSP_R2               0x9d010149
                                             0x53303038
                                             0x47516cf1
                                             0x73476900
    
                                            DUMPING DATA
                                            000 - 9d 01 01 49
                                            004 - 53 30 30 38
                                            008 - 47 51 6c f1
                                            012 - 73 47 69 00
    CMD_SEND:3
                    ARG                      0x00010000
                    MMC_RSP_R1,5,6,7         0x00000500
    CMD_SEND:9
                    ARG                      0x00010000
                    MMC_RSP_R2               0xd04f0132
                                             0x8f5903ff
                                             0xffffffef
                                             0x8a400000
    
                                            DUMPING DATA
                                            000 - d0 4f 01 32
                                            004 - 8f 59 03 ff
                                            008 - ff ff ff ef
                                            012 - 8a 40 00 00
    CMD_SEND:7
                    ARG                      0x00010000
                    MMC_RSP_R1,5,6,7         0x00000700
    CMD_SEND:8
                    ARG                      0x00000000
    selected_mode:0 val:18
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:6
                    ARG                      0x03af0100
                    MMC_RSP_R1b              0x00000800
    CMD_SEND:13
                    ARG                      0x00010000
                    MMC_RSP_R1,5,6,7         0x00000900
    CURR STATE:4
    selected_mode:0 val:18
    CMD_SEND:6
                    ARG                      0x03b70200
                    MMC_RSP_R1b              0x00000800
    CMD_SEND:13
                    ARG                      0x00010000
                    MMC_RSP_R1,5,6,7         0x00000900
    CURR STATE:4
    selected_mode:0 val:38
    CMD_SEND:6
                    ARG                      0x03b90100
                    MMC_RSP_R1b              0x00000800
    CMD_SEND:13
                    ARG                      0x00010000
                    MMC_RSP_R1,5,6,7         0x00000900
    CURR STATE:4
    CMD_SEND:8
                    ARG                      0x00000000
    selected_mode:0 val:38
                    MMC_RSP_R1,5,6,7         0x00000900
    selected_mode:3 val:38
    CMD_SEND:8
                    ARG                      0x00000000
    selected_mode:3 val:38
                    MMC_RSP_R1,5,6,7         0x00000900
    
    MMC write: dev # 0, block # 85, count 1 ... CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:17
                    ARG                      0x00000000
    selected_mode:3 val:38
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:18
                    ARG                      0x00000040
    selected_mode:3 val:38
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:12
                    ARG                      0x00000000
                    MMC_RSP_R1b              0x00000b00
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:18
                    ARG                      0x00000002
    selected_mode:3 val:38
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:12
                    ARG                      0x00000000
                    MMC_RSP_R1b              0x00000b00
    CMD_SEND:16
                    ARG                      0x00000200
                    MMC_RSP_R1,5,6,7         0x00000900
    CMD_SEND:24
                    ARG                      0x00000055
    selected_mode:3 val:38
    EIO(5) thrown here. Line:143 Call:sdhci_transfer_data File:drivers/mmc/sdhci.c
    NORMAL_INTR_STS reg (offset 0x30): 8002
    ERROR_INTR_STS reg (offset 0x32): 20
    ECOMM(70) thrown here. ret=-5 Line:348 Call:sdhci_send_command File:drivers/mmc/sdhci.c
                    RET                      -70
    mmc write failed
    0 blocks written: ERROR
    =>
    =>
    => md.l 0fa1810c 1
    0fa1810c: 0010000a                             ....
    => md.l 0fa18110 1
    0fa18110: 00030007                             ....
    =>
    =>
    => md.l fa18000 4e
    0fa18000: 68415200 00000000 00000000 00000000  .RAh............
    0fa18010: 201030c8 64ecc801 98000407 00000000  .0. ...d........
    0fa18020: 00000000 00000100 00000004 00000002  ................
    0fa18030: 00000004 00000002 00000001 00000000  ................
    0fa18040: 00000002 00000001 00000000 00000000  ................
    0fa18050: 00000000 00000000 00000000 00000000  ................
    0fa18060: 80000000 00000010 00000000 00000000  ................
    0fa18070: 00000008 00000000 00000000 00000000  ................
    0fa18080: 00000000 00000000 00000000 00000000  ................
    0fa18090: 00000000 00000000 00000000 00000000  ................
    0fa180a0: 00000000 00000000 00000000 00000000  ................
    0fa180b0: 00000000 00000000 00000000 00000000  ................
    0fa180c0: 00000000 00000000 00000000 00000000  ................
    0fa180d0: 00000000 00000000 00000000 00000000  ................
    0fa180e0: 00000000 00000000 00000000 00000000  ................
    0fa180f0: 00000000 00000000 00000000 00000000  ................
    0fa18100: 00010001 00000000 10ff30ff 0010000a  .........0......
    0fa18110: 00030007 00000000 00000000 00000000  ................
    0fa18120: 00000000 00000000 00000000 00000000  ................
    0fa18130: 000000e2 00000000                    ........
    =>
    => md.b 0fa10000 264
    0fa10000: 00 00 00 00 00 72 00 00 55 00 00 00 03 00 3a 18  .....r..U.....:.
    0fa10010: 00 09 00 00 ff ff ff ff 03 59 8f 32 01 4f d0 00  .........Y.2.O..
    0fa10020: 00 00 00 00 f0 00 ff 01 38 0b 80 00 07 02 0e 00  ........8.......
    0fa10030: 00 00 00 00 3b 00 7f 02 00 00 00 00 00 00 02 00  ....;...........
    0fa10040: 01 c8 ec 7c 07 04 00 98 00 00 00 00 00 00 00 00  ...|............
    0fa10050: 00 00 00 00 00 00 00 00 8c 92 f0 bd 00 00 00 00  ................
    0fa10060: 00 01 04 00 02 00 04 00 02 00 01 00 00 00 02 00  ................
    0fa10070: 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa100a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa100b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa100c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa100d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa100e0: 00 01 10 01 20 01 30 01 40 01 00 00 00 00 00 00  .... .0.@.......
    0fa100f0: 00 00 00 00 00 00 00 00 20 4e 00 00 00 00 04 10  ........ N......
    0fa10100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10110: 11 4f 04 00 00 00 11 00 00 01 00 20 81 00 00 00  .O......... ....
    0fa10120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa101a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa101b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa101c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa101d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa101e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa101f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10200: 10 05 00 00 c8 30 00 00 00 00 00 00 00 00 00 00  .....0..........
    0fa10210: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10220: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10230: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10240: 00 10 01 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10250: 80 a0 f9 fd 00 00 00 00 00 00 00 00 00 00 00 00  ................
    0fa10260: 00 00 00 00                                      ....
    =>

    With all of these changes, writes still fail. Based on the attached scope image, it looks like the waveform does not have proper setup/hold timing:

    Also shown in the log are register reads of the PHY_CTRL regs, to see if the driver changes worked in setting the values of datasheet Table 6-68:

    => md.l 0fa1810c 1
    0fa1810c: 0010000a                             ....
    => md.l 0fa18110 1
    0fa18110: 00030007                             ....
    =>

    ITAPDLYSEL is being correctly set to 0xa. But ITAPDLYENA is NOT being set to 1, which may still be a driver discrepancy. I tried manually setting this bit from the uboot commandline, but that didn’t make any difference to the end result; mmc write still errors out and the scope looks the same.

    The log also includes dumps of the entire MMCSD0_SS_CFG and MMCSD0_CTL_CFG spaces, if it helps in troubleshooting.

    What do you suggest for next steps?

    Thanks,

    Stuart

  • Hi Stuart,

    For eMMC HS SDR, I do see the write failure locally on TMDS64EVM. All the other modes including legacy seems to be working just fine on the EVM. I will try to get the HS SDR mode working & get back to you.

    Regards,

    Prashant

  • Hello,

    The following patch resolves the eMMC write failure at least on the TI EVM.

    diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
    index 8f109553974..05a65d92a26 100644
    --- a/drivers/mmc/am654_sdhci.c
    +++ b/drivers/mmc/am654_sdhci.c
    @@ -272,10 +272,12 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host)
     	sdhci_set_clock(host->mmc, speed);
     
     	/* switch phy back on */
    -	otap_del_sel = plat->otap_del_sel[mode];
    -	mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
    -	val = (1 << OTAPDLYENA_SHIFT) |
    -	      (otap_del_sel << OTAPDLYSEL_SHIFT);
    +	if(mode != MMC_HS_52) {
    +		otap_del_sel = plat->otap_del_sel[mode];
    +		mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
    +		val = (1 << OTAPDLYENA_SHIFT) |
    +			(otap_del_sel << OTAPDLYSEL_SHIFT);
    +	}
     
     	/* Write to STRBSEL for HS400 speed mode */
     	if (host->mmc->selected_mode == MMC_HS_400) {
    

    This patch makes sure the OTAPDLYENA is not enabled (as mentioned in the datasheet) for the MMC_HS_52 mode.

    => mmc dev 0
    switch to partitions #0, OK
    mmc0(part 0) is current device
    => mmc info
    Device: mmc@fa10000
    Manufacturer ID: 13
    OEM: 4e
    Name: S0J56X
    Bus Speed: 52000000
    Mode: MMC High Speed (52MHz)
    Rd Block Len: 512
    MMC version 5.1
    High Capacity: Yes
    Capacity: 14.8 GiB
    Bus Width: 8-bit
    Erase Group Size: 512 KiB
    HC WP Group Size: 8 MiB
    User Capacity: 14.8 GiB WRREL
    Boot Capacity: 31.5 MiB ENH
    RPMB Capacity: 4 MiB ENH
    Boot area 0 is not write protected
    Boot area 1 is not write protected
    => mmc write $loadaddr 0x0 0x1
    
    MMC write: dev # 0, block # 0, count 1 ... 1 blocks written: OK

    Regards,

    Prashant

  • Prashant,

    The customer has tried your patch, but it is not working. The customer is using the 9.00.00.03 SDK. Is it possible that you used a different SDK version and that is making a significant difference?

    Here is some additional information provided by the customer...

    I applied the patch, and confirmed that OTAPDLYENA is indeed not being set in the PHY_CTRL_4_REG:

    The write command fails with the same log output. The scope shows that the data is now more closely aligned with data (on the wrong edge), as you would expect with no output taps.

    To prove that this is indeed a setup/hold time violation issue, I did one more experiment. I set the OTAPDLYSEL to the maximum value of 0xf and OTAPDLYENA to 1.

    This resulted in a working mmc write. The scope looks like this in this case:

     

    As you can see, there is now ~16ns of setup and ~3ns of hold. This technically meets the 3ns requirement of JEDEC Table 208; but it is still not quite the waveform that datasheet Figure 6-61 promises. The datasheet is guaranteeing the data to be -2.3ns/+2.9ns around the negative edge of the clock.

    Thanks,

    Stuart

  • Prashant,

    Do you have any suggestions for us to try?

    Thanks,

    Stuart

  • Hello,

    The customer is using the 9.00.00.03 SDK. Is it possible that you used a different SDK version and that is making a significant difference?

    I have tried on this SDK version as well & did not see write failure after applying the patch

    [19:01:30.110] U-Boot 2023.04-dirty (Feb 05 2025 - 19:01:01 +0530)
    
    [19:01:30.111] SoC:   AM64X SR2.0 HS-FS
    [19:01:30.111] Model: Texas Instruments AM642 EVM
    [19:01:30.126] Board: AM64-GPEVM rev C
    [19:01:30.126] DRAM:  2 GiB
    [19:01:30.542] Core:  59 devices, 29 uclasses, devicetree: separate
    [19:01:30.542] MMC:   mmc@fa10000: 0, mmc@fa00000: 1
    [19:01:30.558] Loading Environment from MMC... *** Warning - bad CRC, using default environment
    
    [19:01:30.622] In:    serial@2800000
    [19:01:30.622] Out:   serial@2800000
    [19:01:30.622] Err:   serial@2800000
    [19:01:30.686] Net:   eth0: ethernet@8000000port@1
    [19:01:30.702] Hit any key to stop autoboot:  0
    [19:01:30.798] => mmc dev 0
    [19:01:32.206] switch to partitions #0, OK
    [19:01:32.206] mmc0(part 0) is current device
    [19:01:32.222] => mmc info
    [19:01:33.214] Device: mmc@fa10000
    [19:01:33.214] Manufacturer ID: 13
    [19:01:33.214] OEM: 4e
    [19:01:33.214] Name: S0J56X
    [19:01:33.214] Bus Speed: 52000000
    [19:01:33.214] Mode: MMC High Speed (52MHz)
    [19:01:33.214] Rd Block Len: 512
    [19:01:33.215] MMC version 5.1
    [19:01:33.215] High Capacity: Yes
    [19:01:33.215] Capacity: 14.8 GiB
    [19:01:33.230] Bus Width: 8-bit
    [19:01:33.230] Erase Group Size: 512 KiB
    [19:01:33.230] HC WP Group Size: 8 MiB
    [19:01:33.230] User Capacity: 14.8 GiB WRREL
    [19:01:33.231] Boot Capacity: 31.5 MiB ENH
    [19:01:33.231] RPMB Capacity: 4 MiB ENH
    [19:01:33.246] Boot area 0 is not write protected
    [19:01:33.246] Boot area 1 is not write protected
    [19:01:33.246] => mmc write $loadaddr 0x0 0x1
    
    [19:01:38.798] MMC write: dev # 0, block # 0, count 1 ... 1 blocks written: OK

    I am not a hardware expert so can't comment on those setup or hold timing.

    Have they tried on multiple boards & see the same issue on all of them?

    Regards,

    Prashant