PROCESSOR-SDK-AM64X: ddr ecc overhead

Tool/software:

Hi,

I am using dev board TMDS64EVM without os. 

I enabled ECC over ddr and over msram. 

1.  Is there any overhead when running with ECC enabled? Since 1/9 of the memory is allocated for ECC, does writing data to the remaining 8/9 of the memory impose any processing overhead on the main CPU (e.g., R5F)?

2.  If there is an overhead, what would it be?

I am talking about cpu overhead during the write read.

eg: When data is written to DDR, the ECC logic must compute the parity bits, which can add latency. or write to the 1/9 area.


Thanks.