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TDA4VEN-Q1: How to enable TDA4Ventry WKUP_LFOSC0_XI/XO connected 32.768KHz crystal.

Part Number: TDA4VEN-Q1

Tool/software:

Hi Experts:

My customer want enable TDA4Ventry WKUP_LFOSC0_XI/XO pin's RTC feature. 

I has tested TDA4Ventry EVM board with RDK09.02 release, crystal Y3 do not send out 32.768K clock. At TRM introduce default mode WKUP_LFOSC0 is disabled. 

How we can enable those 32.768K crystal?

Best Regards!

Han Tao

At linux use bind command enable rtc-ti-k3 but failed. From system log this module driver has been loaded.

root@j722s-evm:/sys/bus/platform/drivers/rtc-ti-k3# echo 2b1f0000.rtc > bind
-sh: echo: write error: Device or resource busy
root@j722s-evm:/sys/bus/platform/drivers/rtc-ti-k3# rtc-ti-k3^C
root@j722s-evm:/sys/bus/platform/drivers/rtc-ti-k3# dmesg|grep -i rtc
[ 10.610640] rtc-ti-k3 2b1f0000.rtc: registered as rtc0
[ 10.625237] rtc-ti-k3 2b1f0000.rtc: setting system clock to 1970-01-01T00:00:01 UTC (1)
[ 10.860629] tidss 30220000.dss: [drm] Cannot find any crtc or sizes
[ 10.869934] tidss 30220000.dss: [drm] Cannot find any crtc or sizes
[1541470.595035] rtc-ti-k3 2b1f0000.rtc: Failed to fence(-110)! Potential config issue?
root@j722s-evm:/sys/bus/platform/drivers/rtc-ti-k3# [1546782.730204] audit: type=1334 audit(1710633601.503:55): prog-id=37 op=LOAD
[1546782.882393] audit: type=1334 audit(1710633601.655:56): prog-id=37 op=UNLOAD

  • Hi,

    I have assigned your thread to the expert engineer who will be able to resolve this. Thank you for your patience.

    Thanks,

    Neehar

  • Neehar, 

    May you provide feedback on this question?

    BR, Rich

  • Hi Neehar:

    Could you please share how to enable WKUP_LFOSC0_XI connected 32.768K RTC crystal?

    If linux do not support WKUP_LFOSC0, whether MCU-R5F can enable those RTC clock? Looks like at RDK-Linux/ RDK-MCU-PLUS all do not provide example enable this crystal.

    Best Regards!

    Han Tao

  • Brad, Kevin, 

    Can this 32.768K crystal been removed for low power mode? 

    Will this crystal affect booting?

    BR, Rich

  • MCU_CTRL_MMR0_CFG0_LFXOSC_CTRL.7 [PD] should be 0 to start the crystal.

    0450 8038h MCU_CTRL_MMR0_CFG0_LFXOSC_CTRL 128d
    0450 8038h MCU_CTRL_MMR0_CFG0_LFXOSC_CTRL 31:8 RESERVED NONE F4240h Reserved
    0450 8038h MCU_CTRL_MMR0_CFG0_LFXOSC_CTRL 7 LFXOSC_CTRL_PD_C R/W 1h Oscillator powerdown control.  When set, oscillator is deactivated.  Oscillator output is tristated if bp_c=0
    Field values (others are reserved):
    1'b0 - ACTIVE
    1'b1 - POWERDOWN
     Reset Source: mod_por_rst_n
    0450 8038h MCU_CTRL_MMR0_CFG0_LFXOSC_CTRL 6:5 RESERVED NONE 0h Reserved
    0450 8038h MCU_CTRL_MMR0_CFG0_LFXOSC_CTRL 4 LFXOSC_CTRL_BP_C R/W 0h Oscillator bypass control.  When set, oscillator is in bypass mode
    Field values (others are reserved):
    1'b0 - ACTIVE
    1'b1 - BYPASS
     Reset Source: mod_por_rst_n
    0450 8038h MCU_CTRL_MMR0_CFG0_LFXOSC_CTRL 3:0 RESERVED NONE 0h Reserved

    Kevin