p102-103:
t3: RESETSTATz is driven low once the DVDD18 supply is available. From Fig7-5, the RESETSTATz is driven low from the start. Why is that so?
t4b: RESETFULLZ and RESETz may be driven high any time after DVDD18 is at a valid level. In a PORz-controlled boot both RESETFULLz and RESETz must be high before PORz is driven high. From Fig7-5, the RESETFULLz is driven high after PORz. Why is that so?
t6: Device initialization requires 500 SYSCLK1 periods after the power stabilization phase. When does device initialization starts? Is it at the start of arrow head t6? Device initialization starts when the clocks start toggling? Both the refclk and the DDRclk?
t7: RESETFULLz must be held low for at least 24 transitions of the SYSCLK1 after PORz has stabilized at a high level. t7 contradicts with t4b. Is it because Fig7-5 shows the case of not a PORz-controlled boot?
t8: What is a efuse farm and efuse farm scan?
t9 and t10: Is the t9 and t10 arrow heads correct? Shouldn't the arrow heads be before RESETFULLz starts to ramp and after RESETFULLz finishes ramping?