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PMIC IC TPS6594133ARWERQ1 fails to Enable after replacing Faulty IC, No output detected from the IC.

Part Number: J784S4XEVM
Other Parts Discussed in Thread: TDA4VH, TPS6594-Q1

Tool/software:

Hello Team,

J784S4XG01EVM (TDA4AP, TDA4VP, TDA4AH, TDA4VH)

Revision: PROC141E4

PMIC: TPS6594133ARWERQ1

Problem Statement: We are currently using the J784S4XG01EVM board for our POC development work and have encountered a significant hardware issue following an unexpected PMIC short circuit (TPS6594133ARWERQ1) problem.  After the power problem, we have observed only LD7 (VSYS_3V3), LD8(VSYS_MCUIO_3V3), LD9(VSYS_IO_3V3), only LD7 (VSYS_3V3) is enabled. since VSYS_MCUIO_3V3, VSYS_IO_3V3 is dependent on PMIC (TPS6594133ARWERQ1), we have replaced the faulty PMIC (TPS6594133ARWERQ1) and again tried to power the board. Again same issue persist, only LD7 (VSYS_3V3) is enabled. We tried to debug using the schematics all the inputs to the PMIC. we haven't found the exact root cause.

Here is our analysis:

Pin no.  Inputs to PMIC Signal Dependency for to get enabled ON/OFF Pin no.  Outsputs from PMIC Signal ON/OFF
4 VCCA VCCA - ON 2 VOUT_LDOVINT VINT_PMIC_1V8 OFF
48 VIO_IN VIO_IN - ON 3 VOUT_LDOVRTC VRTC_PMIC_1V8 OFF
26 PVIN_B1 PVIN_B1 - ON 13 VOUT_LDO1 VDD_MCUIO_1V8_REG OFF
17 PVIN_B2 PVIN_B2 - ON 11 VOUT_LDO2 VDD_MCUIO_3V3_REG OFF
45 PVIN_B3 PVIN_B3 - ON 9 VOUT_LDO3 VDA_DLL_0V8_REG OFF
54 PVIN_B4 PVIN_B4 - ON 7 VOUT_LDO4 VDA_MCU_1V8_REG OFF
35 PVIN_B5 PVIN_B5 - ON 27 SW_B1A VDD_DDR_1V1 OFF
8 PVIN_LDO3 PVIN_LDO3 - ON 28 SW_B1B VDD_DDR_1V1 OFF
10 PVIN_LDO4 PVIN_LDO4 - ON 15 SW_B2A VDD_DDR_1V1 OFF
12 PVIN_LDO12 PVIN_LDO12 - ON 16 SW_B2B VDD_DDR_1V1 OFF
52 OVPGDRV OVPGDRV - ON 43 SW_B3A VDD_RAM_0V85_REG OFF
51 VSYS_SENSE VSYS_SENSE - ON 44 SW_B3B VDD_RAM_0V85_REG OFF
20 nPWRON/ENABLE PMIC_ENABLE - ON 55 SW_B4A VDD_IO_1V8_REG OFF
47 GPIO4 SOC_PWR_WKn - ON 56 SW_B4B VDD_IO_1V8_REG OFF
38 OSC32KIN LEOA_OSC32KIN - OFF 34 SW_B5A VDD_MCU_0V85_REG OFF
46 GPIO3 SOC_SAFETY_ERRZ MCU OFF 39 OSC32KOUT LEOA_OSC32KOUT OFF
18 GPIO7 MCU_SAFETY_ERRZ MCU OFF 40 OSC32KCAP LEOA_OSC32KCAP OFF
41 GPIO8 PMIC_WDOG_DISABLE | | MAIN_PWRGRP_IRQn_BUF PMIC Output OFF 1 AMUXOUT AMUXOUT_A OFF
42 GPIO10 MCU_PWRGRP_IRQn PMIC Output OFF 25 nRSTOUT H_MCU_PORz OFF
22 FB_B1 VDD_DDR_1V1 PMIC Output OFF 14 nINT H_MCU_INTn OFF
49 FB_B4 VDD_RAM_0V85 PMIC Output OFF 29 EN_DRV EN_DRV OFF
50 FB_B4 VDD_IO_1V8 PMIC Output OFF 23 GPIO5 EN_GPIO_RET_3V3 OFF
37 FB_B5 VDD_MCU_0V85 PMIC Output OFF 24 GPIO6 EN_DDR_RET_1V1 OFF
19 GPIO9 EN_3V3_VIO OFF
53 GPIO11 H_SOC_PORz OFF
Note: LD7 VSYS_3V3 PMIC Output ON
LD8 VSYS_MCUIO_3V3  PMIC Output OFF
LD9 VSYS_IO_3V3  PMIC Output OFF

ON Condition: Voltage observed within default range. OFF condition No voltage observed.

we have checked all the necessary INPUT's to the PMIC. They are ON and which are OFF are dependent on the PMIC OUTPUT itself which goes to other ICs as an EN signals and from those ICs OUTPUT it comes back to PMIC IC again as an INPUT. However all the OUTPUT from the PMIC is OFF. we have also checked the power sequence for core supply VDD_CPU_AVS & VDD_CORE_OV8. They are ON.

we need your support to understand is there any software configuration & NVM settings we need to do when we replace faulty PMIC (TPS6594133ARWERQ1) when new one.

Also we need your support to understand exact root cause and to get board powered up. Please provide guidance on how to proceed with further diagnostics and potential rework.

  • We are currently using the J784S4XG01EVM board for our POC development work and have encountered a significant hardware issue following an unexpected PMIC short circuit (TPS6594133ARWERQ1) problem.  After the power problem, we have observed only LD7 (VSYS_3V3), LD8(VSYS_MCUIO_3V3), LD9(VSYS_IO_3V3), only LD7 (VSYS_3V3) is enabled. since VSYS_MCUIO_3V3, VSYS_IO_3V3 is dependent on PMIC (TPS6594133ARWERQ1), we have replaced the faulty PMIC (TPS6594133ARWERQ1) and again tried to power the board. Again same issue persist, only LD7 (VSYS_3V3) is enabled. We tried to debug using the schematics all the inputs to the PMIC. we haven't found the exact root cause

    Do you have any scope shots demonstrating this short circuit, any details on the original problem would be very helpful, otherwise you'd be replacing a working PMIC with another working PMIC

    Please work through the User's Guide for the PMIC in order to be better align with the power up sequence, any scope shots provided would be very helpful: link to PMIC User's Guide HERE

    BR,

    Nicholas McNamara

  • Hello Nicholas McNamara,

    When board was OK it was detecting 0.7 ampere of of current. we were checking the pin voltage at PMIC (TPS6594133ARWERQ1) pin no. 42 (GPIO4). Due to some unexpected shorting of pins, the current dropped from 0.7 ampere to 0.1 ampere and LD8(SYS_MCUIO_3V3) and LD9V(VSYS_IO_3V3)  turned OFF. Since SYS_MCUIO_3V3 is the output from the PMIC (TPS6594133ARWERQ1) and VSYS_IO_3V3 depends on output EN signal from PMIC (TPS6594133ARWERQ1). We thought PMIC must have been got short. Then to analyze the failure cause we performed some steps:

    Step1: we checked all the input and output capacitors of the TPS6594133ARWERQ1. Input side capacitors were OK but some of the buck regulators capacitors were shorted. 
    Step2: we thought PMIC might have gone. So we replaced the PMIC with the new working PMIC.
    Step3: we again checked the output side capacitors of the PMIC. The shorting was gone.
    Step4: we the tried to power up the board again. we realized that same condition persist. Both the LDs were still OFF.
    Step5: we then checked all the inputs and output signals to the PMIC. We found that all the outputs signals were OFF (Voltage level was 0 V) and some of the inputs to the PMIC were also OFF (Voltage level was 0 V). The list of all the inputs and outputs signals we checked are listed below:

    We need your support to understand exact root cause and to get board powered up. We would also like to have a call with TI on the further diagnostic. Please provide guidance on how to proceed with further diagnostics and potential rework.

    Pin no.  Inputs Signal Dependency for to get enabled ON/OFF Pin no.  Inputs Signal ON/OFF
    4 VCCA VCCA - ON(3.3V) 2 VOUT_LDOVINT VINT_PMIC_1V8 OFF (0 V)
    48 VIO_IN VIO_IN - ON(3.3V) 3 VOUT_LDOVRTC VRTC_PMIC_1V8 OFF (0 V)
    26 PVIN_B1 PVIN_B1 - ON(3.3V) 13 VOUT_LDO1 VDD_MCUIO_1V8_REG OFF (0 V)
    17 PVIN_B2 PVIN_B2 - ON(3.3V) 11 VOUT_LDO2 VDD_MCUIO_3V3_REG OFF (0 V)
    45 PVIN_B3 PVIN_B3 - ON(3.3V) 9 VOUT_LDO3 VDA_DLL_0V8_REG OFF (0 V)
    54 PVIN_B4 PVIN_B4 - ON(3.3V) 7 VOUT_LDO4 VDA_MCU_1V8_REG OFF (0 V)
    35 PVIN_B5 PVIN_B5 - ON(3.3V) 27 SW_B1A VDD_DDR_1V1 OFF (0 V)
    8 PVIN_LDO3 PVIN_LDO3 - ON(3.3V) 28 SW_B1B VDD_DDR_1V1 OFF (0 V)
    10 PVIN_LDO4 PVIN_LDO4 - ON(3.3V) 15 SW_B2A VDD_DDR_1V1 OFF (0 V)
    12 PVIN_LDO12 PVIN_LDO12 - ON(3.3V) 16 SW_B2B VDD_DDR_1V1 OFF (0 V)
    52 OVPGDRV OVPGDRV - ON(3.3V) 43 SW_B3A VDD_RAM_0V85_REG OFF (0 V)
    51 VSYS_SENSE VSYS_SENSE - ON(3.3V) 44 SW_B3B VDD_RAM_0V85_REG OFF (0 V)
    20 nPWRON/ENABLE PMIC_ENABLE - ON(3.3V) 55 SW_B4A VDD_IO_1V8_REG OFF (0 V)
    47 GPIO4 SOC_PWR_WKn - ON(3.3V) 56 SW_B4B VDD_IO_1V8_REG OFF (0 V)
    38 OSC32KIN LEOA_OSC32KIN - OFF (0 V) 34 SW_B5A VDD_MCU_0V85_REG OFF (0 V)
    46 GPIO3 SOC_SAFETY_ERRZ MCU OFF (0 V) 39 OSC32KOUT LEOA_OSC32KOUT OFF (0 V)
    18 GPIO7 MCU_SAFETY_ERRZ MCU OFF (0 V) 40 OSC32KCAP LEOA_OSC32KCAP OFF (0 V)
    41 GPIO8 PMIC_WDOG_DISABLE | | MAIN_PWRGRP_IRQn_BUF PMIC Output OFF (0 V) 1 AMUXOUT AMUXOUT_A OFF (0 V)
    42 GPIO10 MCU_PWRGRP_IRQn PMIC Output OFF (0 V) 25 nRSTOUT H_MCU_PORz OFF (0 V)
    22 FB_B1 VDD_DDR_1V1 PMIC Output OFF (0 V) 14 nINT H_MCU_INTn OFF (0 V)
    49 FB_B4 VDD_RAM_0V85 PMIC Output OFF (0 V) 29 EN_DRV EN_DRV OFF (0 V)
    50 FB_B4 VDD_IO_1V8 PMIC Output OFF (0 V) 23 GPIO5 EN_GPIO_RET_3V3 OFF (0 V)
    37 FB_B5 VDD_MCU_0V85 PMIC Output OFF (0 V) 24 GPIO6 EN_DDR_RET_1V1 OFF (0 V)
    19 GPIO9 EN_3V3_VIO OFF (0 V)
    53 GPIO11 H_SOC_PORz OFF (0 V)
    Note: LD7 VSYS_3V3 PMIC Output ON(3.3V)
    LD8 VSYS_MCUIO_3V3  PMIC Output OFF (0 V)
    LD9 VSYS_IO_3V3  PMIC Output OFF (0 V)
    VDD_CORE_OV8 Core Supply ON(800mV)
    VDD_CPU_AVS  Core Supply ON(800mV)

    Regards,

    Tanishq Kanungo

  • Hello Tanishq,

    My quick recommendation is to probe the External lines from J37, after this failed power up attempt. For an I2C connection to read back registers 0x5A to 0x6C, these are the interrupt registers which would indicate the faults that occur, for details please see the datasheet for the TPS6594-Q1.

    The other item to do in parallel is to do oscilloscope measurements to see where in the power sequence does the bring up fail, these oscilloscope captures are needed at the bare minimum, for anything wrong in the power up will gate the PMIC from coming up. This is a safety PMIC failure to address problems in the power sequence will always result in the failure to bring up any of the power resources.

    Please go through the PMIC User's Guide above from the TO_ACTIVE sequence.

    PIN4: VCCA, main power supply turns on internal LDOs @ 2.7V

    PIN20: nPWRON/ENABLE

    Please for these captures have either signal, if starting the EVM from cold please trigger on either VCCA or nPWRON/ENABLE.

    Include a oscilloscope capture on startup where:

    1. VCCA, triggered on 2.7V

    2. VINT

    3. VRTC

    4. nPWRON/ENABLE

    For all other captures, please have nPWRON/ENABLE on the rising edge, I'm looking for behavior on where the power sequence stop, so step through the power sequence even if there's a failure to bring up. If there's residual voltage (~150mV) on the power resource before it is to be enabled this will stop the powering up process, more on this in the datasheet.

    We can do a call please send an email to: n-mcnamara@ti.com

    I am located in Dallas, so CST time.

    BR,

    Nicholas McNamara

  • Hello Nicholas McNamara,

    I took the oscilloscope measurements, also gone through the TO_ACTIVE SEQUEENCE. These are the results:

    1) This result is between VCCA  & nPWRON/ENABLE and VCCA as a trigger source. Both signals are coming in PMIC. After Power ON from cold state, VCCA comes first then nPWRON/ENABLE comes after it. This reading shows PMIC inputs are enabled.

    2) This result is between VCCA & VINT. VCCA as a trigger source. No even instantaneous spike is observed in VINT when VCCA gets triggered after POWER ON from cold state.

    3) This result is between VCCA & VRTC. VCCA as a trigger source. No even instantaneous spike is observed in VRTC when VCCA gets triggered after POWER ON from cold state.

    I also checked all the LDOs, Buck Regulators and EN signals of PMIC output as per the TO_ACTIVE sequence. No instantaneous spike is observed when VCCA / nPWRON/ENABLE is kept as a trigger source after POWER ON from cold state.

    Regards, 

    Tanishq

  • Hello Tanishq,

    Thank you for the oscilloscope shots, they help so very much. It looks like the VINT & VRTC LDOs aren't turning on, which doesn't make sense unless there are:

    1. Internal damage (quite unlikely)

    2. Shorts on the filtering capacitors

    3. VCCA measured is actually VSYS_3V3 (Most likely cause)

    There's a safety FET for this device and in the case of a failure from short test or from an Over Voltage Protection (OVP), you can read on this in the section labelled: 8.3 Feature Description 8.3.1 System Supply Voltage Monitor and Over-Voltage Protection

    In the datasheet. To confirm #3, please measure the following when applying power from a cold start.

    Trigger on 1. please if you can, this would demonstrate what exactly is going on during the power up process that would lead to a lock out event which would open the FET not allowing VCCA_3V3 through.

    1. VSYS_3V3

    2. VCCA_3V3 (TP30)

    3. OVPGDRV

    4. VSYS_SENSE (Between R78 & the diode)

    BR,

    Nicholas McNamara

  • Hello Nicholas McNamara,

    I recorded the oscilloscope measurements. These are the results:

    1) This result is between VSYS_3V3 (tapped before R80)  & VCCA_3V3 (TP30) and VSYS_3V3 as a trigger source. Both signals are showing voltage levels. After Power ON from cold state, VSYS_3V3 comes first then after VCCA_3V3 comes after it.  VSYS_3V3 reads 3.43V and VCCA_3V3 reads 3.37V.

       

    2) This result is between VSYS_3V3 (tapped before R80)  & OVPGDRV (tapped before R154) and VSYS_3V3 as a trigger source. Both signals are showing voltage levels. After Power ON from cold state, VSYS_3V3 reads 3.35V and OVPGDRV reads 9.08V. 

      

    According to this, OVPGDRV reads 9.08 as expected. calculated OVPGDRV = 0.9*3*3.35 = 9.045V

    3) This result is between VSYS_3V3 (tapped before R80)  & VSYS_SENSE (tapped between R78 & the diode) and VSYS_3V3 as a trigger source. Both signals are showing voltage levels. After Power ON from cold state, VSYS_3V3 reads 3.43V and VSYS_SENSE reads 3.37V.

      

    Also I request if you could please share your available time slots for a call on Friday, 31st Jan, 2025? I will send you the invitation accordingly.

    Regards, 

    Tanishq

  • Hello Tanishq,

    Yes, let's schedule a call for tomorrow. My times where I'll be able to move things for that call would be 9:00-16:00 CST (Dallas Time).

    Will be looking into the possibility of a cause in the lab today, but the VINT & VRTC in a normal power up is supposed to be up right after VCCA is applied. See below: The valid on request for TPS6594133A is the ENABLE pin going HIGH, as you can see the VINT & VRTC are not up something is up.

    BR,

    Nicholas McNamara

  • Hello Nicholas McNamara,

    can we plan a call on Monday, 3rd Feb, 2025. Also I request if you could please share your preferred time slots in between 9:00-16:00 CST (Dallas Time). I will send you the invitation accordingly.

    Regards,

    Tanishq.

  • Hello Tanishq,

    Sorry we couldn't make something for today, please send an invite for any time between 10:30-16:00 CST, and we'll discuss the course of actions to take next.

    Here's my email: n-mcnamara@ti.com

    BR,

    Nicholas McNamara

  • Hello Nicholas McNamara,

    I have sent you a teams meeting invite for our discussion on 3rd Feb, 2025 (Today).

    Time:  11:00 AM to 12:00 PM CST (Dallas, US Time).

    For our reference, the invite mentions 10:30 PM to 11:30 PM IST (Indian Time Zone). 

    Kindly accept the meeting invite. Looking forward to our discussion.

    Regards,

    Tanishq.

  • Hello Tanishq,

    After trying the test, I wanted to see if applying a voltage on the power rails, BUCKs/LDOs would be a cause for the VINT & VRTCs. The answer is yes, if applying a voltage high enough on these pins will cause the VINT & VRTC to not come up. Could you do me a favor after applying the power, could you measure again if any of the outputs have any residual voltages on them? I know it may sound silly, but could you try once more, a scope shot is preferable.

    If not, a swap may be in order, but please reach out to your local FAE on trying to pursue a replacement EVM. We'll speak tomorrow.

    BR,

    Nicholas McNamara

  • Hello Nicholas McNamara,

    I recorded the oscilloscope measurements on all the Bucks and LDOs. No residual voltage was observed in them. These are the results:

    1) This result is between VCCA_3V3 & VDD_DDR_1V1 and VCCA_3V3 as a trigger source. No residual voltage is observed in VDD_DDR_1V1 when VCCA_3V3 gets triggered after POWER ON from cold state.

    2) This result is between VCCA_3V3 & VDD_RAM_0V85_REG and VCCA_3V3 as a trigger source. No residual voltage is observed in VDD_RAM_0V85_REG when VCCA_3V3 gets triggered after POWER ON from cold state.

    3) This result is between VCCA_3V3 & VDD_IO_1V8_REG and VCCA_3V3 as a trigger source. No residual voltage is observed in VDD_IO_1V8_REG when VCCA_3V3 gets triggered after POWER ON from cold state.

    4) This result is between VCCA_3V3 & VDD_MCU_0V85_REG and VCCA_3V3 as a trigger source. No residual voltage is observed in VDD_MCU_0V85_REG when VCCA_3V3 gets triggered after POWER ON from cold state.

    5) This result is between VCCA_3V3 & VINT_PMIC_1V8 and VCCA_3V3 as a trigger source. No residual voltage is observed in VINT_PMIC_1V8 when VCCA_3V3 gets triggered after POWER ON from cold state.

    6) This result is between VCCA_3V3 & VRTC_PMIC_1V8 and VCCA_3V3 as a trigger source. No residual voltage is observed in VRTC_PMIC_1V8 when VCCA_3V3 gets triggered after POWER ON from cold state.

    7) This result is between VCCA_3V3 & VDD_MCUIO_1V8_REG and VCCA_3V3 as a trigger source. No residual voltage is observed in VDD_MCUIO_1V8_REG when VCCA_3V3 gets triggered after POWER ON from cold state.

    8) This result is between VCCA_3V3 & VDD_MCUIO_3V3_REG and VCCA_3V3 as a trigger source. No residual voltage is observed in VDD_MCUIO_3V3_REG when VCCA_3V3 gets triggered after POWER ON from cold state.

    9) This result is between VCCA_3V3 & VDA_DLL_0V8_REG and VCCA_3V3 as a trigger source. No residual voltage is observed in VDA_DLL_0V8_REG when VCCA_3V3 gets triggered after POWER ON from cold state.

    10) This result is between VCCA_3V3 & VDA_MCU_1V8_REG and  VCCA_3V3 as a trigger source. No residual voltage is observed in VDA_MCU_1V8_REG when VCCA_3V3 gets triggered after POWER ON from cold state.

    Also I will be sending you teams invite on mail for the same time as yesterdays.

    Regards,

    Tanishq Kanungo

  • Hello Nicholas McNamara,

    I have sent you a teams meeting invite for our discussion on 4rd Feb, 2025 (Today).

    Time:  11:00 AM to 12:00 PM CST (Dallas, US Time).

    For our reference, the invite mentions 10:30 PM to 11:30 PM IST (Indian Time Zone). 

    Kindly accept the meeting invite. Looking forward to our discussion.

    Request you to join the latest invite.

    Regards,

    Tanishq.

  • Hello Tanishq,

    This has been moved over to the Processor forums.

    Quick question to the J7 team, have any customers had an issue trying to implement the S2R feature on this EVM as of yet?

    BR,

    Nicholas McNamara

  • Hello Processor Forum team,

    Thread Title: PMIC IC TPS6594133ARWERQ1 is not enabling due to faults n other board components.

    J784S4XG01EVM (TDA4AP, TDA4VP, TDA4AH, TDA4VH)

    Revision: PROC141E4

    PMIC: TPS6594133ARWERQ1

    Problem Statement: I am currently using the J784S4XG01EVM board for our POC development work and have encountered a significant hardware issue following an unexpected PMIC short circuit (TPS6594133ARWERQ1) problem.  After the power problem, I have observed only LD7 (VSYS_3V3), LD8(VSYS_MCUIO_3V3), LD9(VSYS_IO_3V3), only LD7 (VSYS_3V3) is enabled. since VSYS_MCUIO_3V3, VSYS_IO_3V3 is dependent on PMIC (TPS6594133ARWERQ1), I have replaced the faulty PMIC (TPS6594133ARWERQ1) and again tried to power the board. Again same issue persist, only LD7 (VSYS_3V3) is enabled. 

    I registered a thread on TI E2E forum titled PMIC IC TPS6594133ARWERQ1 fails to Enable after replacing Faulty IC, No output detected from the IC for further diagnostics. The conclusion of this thread was that PMIC inputs are working as expected and PMIC is OK. There can be fault in the output side part/circuits of the PMIC on the EVM board due which is stopping PMIC from powering up.

    I kindly request processor team to help with further diagnostic and debugging to check if there is any fault in other parts of the EVM board due to which PMIC is not powering up.

    Regards,

    Tanishq Kanungo