Part Number: DRA829V
Tool/software:
Dear TI team,
Working on a 2-L SerDes driver for the PCIe subsystem, I am not sure about the right register initialization sequence and recommended register settings, apart from default values. This information can't be found in the TRM (Rev. D).
In a related E2E thread (DRA829V: 2-L SerDes Register DFE_BIASTRIM_PREG_j - Processors forum - Processors - TI E2E support forums), the register setting of an exemplary register is stated as invalid due to different register offsets in the referred SDK (phy « drivers - ti-linux-kernel/ti-linux-kernel - This repo contains a Linux kernel that has been integrated with outstanding TI open source patches based on the open source Linux kernel found at kernel.org. Contributions to this kernel need to be sent to the open source community for review.).
Which reference is the most applicable and provides a recommended 2-L SerDes register initialization sequence and values to be configured?
Thanks a lot for your help and please let me know, when you need more details.
Best regards,
Jakob
