• State Resolved
  • Locked Locked
  • Replies 6 replies
  • Answers 2 answers
  • Subscribers 99 subscribers
  • Views 309 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA4AH-Q1: CPSW9G SERDES - Port Mapping

Scott Brown
Prodigy 190 points
Part Number: TDA4AH-Q1
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hello,

I have two questions related to CPSW9G configuration and syscfg.

1. Within SPRSP79B under Table4-1, it mentions that:

PORT1 Signals: SGMII1, Modes: One of 5Gb, 10Gb USXGMII/XFI, 2.5 Gb SGMII/XAUI, 1Gb SGMII, 5Gb QSGMII
PORT2 Signals: SGMII2, Modes: One of 5Gb, 10Gb USXGMII/XFI, 2.5 Gb SGMII/XAUI, 1Gb SGMII, 5Gb QSGMII
PORTn (n=3 thru 8) Signals: SGMIIn, Modes: One of 2.5 Gb SGMII/XAUI, 1Gb SGMII, 5Gb QSGMII

If QSGMII is used on any SGMII Port 1 thru 4, then SGMII1/2/3/4 cannot be used for Ethernet functionality since all 4 internal CPSW
ports map to the selected QSGMII SERDES port

The J784s4 syscfg file within the SDK only enables SGMII7 and SGMII8. This matches the schematic for the J784s4.

We have used ENET-EXP-2 for USXGMII, which is either SGMII7/8. However according to SPRSP79B isn’t USXGMII compatible.

In examples in the SDK, MAC_PORT_2 is used for USXGMII. Does SGMII7 not equate to MAC_PORT_7 in the SDK?

Please can you clarify how SGMIIn relates to MAC_PORT_n?

2. We are trying to configure our board using syscfg. Why when we use syscfg 1.20, and modifying the enet_cpsw9g configuration, the data configuration file is not updated as it does with other peripherals?

  • 0
    TI__Expert 4580 points

    Hello Scott,

    Scott Brown said:
    2. We are trying to configure our board using syscfg. Why when we use syscfg 1.20, and modifying the enet_cpsw9g configuration, the data configuration file is not updated as it does with other peripherals?

    Is this referring to the SysConfig PinMux Tool (found here: TDA4AH-Q1 SysConfig PinMux Tool)? If yes, this is because the PinMux Tool is responsible for configuring the MUXMODE within the PADCONFIG registers of applicable pins. The SERDES muxing is controlled outside of these PADCONFIG registers; therefore, the data configuration file will not have any updated PADCONFIG registers.

    I will defer to our software expert for the first question.

    Regards,
    Mark

  • 0
    TI__Guru 63390 points

    (Hi,

    Scott Brown said:
    We have used ENET-EXP-2 for USXGMII, which is either SGMII7/8. However according to SPRSP79B isn’t USXGMII compatible.

    Yes, Port-7/8 are not compatible for USXGMII.
    Only Port-1, Port-2 supports USXGMII/XFI interface as mentioned in SPRSP79B.

    Scott Brown said:
    In examples in the SDK, MAC_PORT_2 is used for USXGMII. Does SGMII7 not equate to MAC_PORT_7 in the SDK?


    Please find the below image, captured from TRM. (https://www.ti.com/lit/zip/spruj52)


    TI EVM has SerDes2 Lane2, Lane3 are mapped to ENET-EXP1 and ENET-EXP-2.

    If you look at SerDes2 Lane2 it can be configured either Port-7 (SGMII/XAUI/QSGMII) or Port-0 (USXGMII/XFI/SGMII/XAUI/QSGMII).
    By default RTOS ETHFW configured Port-1 in QSGMII Mode.

    Scott Brown said:
    Please can you clarify how SGMIIn relates to MAC_PORT_n?

    SGMII1 is MAC_Port1 i.e. SGMII and MAC Ports are mapped one to one.

    Above information will clarify all queries.

    Please refer to TRM shared above for more details.

    Best Regards,
    Sudheer

  • 0 in reply to Doredla Sudheer Kumar
    Prodigy 190 points

    Hi Sudheer,

    Thanks for your response. It was useful to clarify.

    Doredla Sudheer Kumar said:
    Yes, Port-7/8 is compatible for USXGMII.

    Do you mean here that it's compatible for QSGMII?

    Also, I notice in the SDK that when using QSGMII we don't stick to contiguous ports like SPRSP79B seems to suggest we have to. E.g. for ENET-EXP-1, MAC ports (1,3,4,5) are used. Do you know why this is?

    If QSGMII is used on any SGMII Port 1 thru 4, then SGMII1/2/3/4 cannot be used for Ethernet functionality since all 4 internal CPSW ports map to the selected QSGMII SERDES port.

    Thanks,

    Scott

  • 0 in reply to Scott Brown
    TI__Guru 63390 points

    Hi, 

    Scott Brown said:
    Doredla Sudheer Kumar said:
    Yes, Port-7/8 is compatible for USXGMII.

    Do you mean here that it's compatible for QSGMII?

    I means lanes rom Serdes2 can be used for USXGMII as port-1, port-2 mapped to same SerDes lanes on different IP instance.

    I have corrected above statement. 

    All ports supports QSGMII/SGMII/XAUI as mentioned above. 

    Scott Brown said:
    Also, I notice in the SDK that when using QSGMII we don't stick to contiguous ports like SPRSP79B seems to suggest we have to. E.g. for ENET-EXP-1, MAC ports (1,3,4,5) are used. Do you know why this is?

    Yes, we have a provision to use port-2 from Exp-2. 

    It is not necessary to have QSGMII ports contiguous. Except the port configured as QSGMII master port the first three QSGMII sub ports belongs to that QSGMII master. 

    If you want two QSGMII interfaces expect the two mater ports rest all to be sub ports among those starting from port-1 the first three sub belongs to first mater port and next three belongs to next master port. 

    Best Regards, 

    Sudheer

  • 0 in reply to Doredla Sudheer Kumar
    Prodigy 190 points

    Perfect, thank you.

    Just to check my understanding:

    Can you clarify if we can have QSGMII on port 3, 4, 5 and 6 (Port 3 being master port), and then port 7 & 8 used for 2 independent SGMII?

    If yes, what is the meaning of the statement in the SPRSP79B datasheet?

    “If QSGMII is used on any SGMII Port 1 thru 4, then SGMII1/2/3/4 cannot be used for Ethernet functionality since all 4 internal CPSW
    ports map to the selected QSGMII SERDES port.
    If QSGMII is used on any SGMII Port 5 thru 8, then SGMII5/6/7/8 cannot be used for Ethernet functionality since all 4 internal CPSW
    ports map to the selected QSGMII SERDES port.””

  • +1 in reply to Scott Brown
    TI__Guru 63390 points

    Hi,

    Scott Brown said:
    Can you clarify if we can have QSGMII on port 3, 4, 5 and 6 (Port 3 being master port), and then port 7 & 8 used for 2 independent SGMII?

    yes, you can use.

    Scott Brown said:

    If yes, what is the meaning of the statement in the SPRSP79B datasheet?

    “If QSGMII is used on any SGMII Port 1 thru 4, then SGMII1/2/3/4 cannot be used for Ethernet functionality since all 4 internal CPSW
    ports map to the selected QSGMII SERDES port.
    If QSGMII is used on any SGMII Port 5 thru 8, then SGMII5/6/7/8 cannot be used for Ethernet functionality since all 4 internal CPSW
    ports map to the selected QSGMII SERDES port.””

    It would be documentation issue.
    As informed above by default ETHFW application enables Port-1 (Master), Port-3, Port-4, Port-5 as slave ports as per TI EVM.

    Best Regards,
    Sudheer