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TSK does not run

Hello everyone,

      I want to test how to the TSK run in a single file, and TSK activated from SWI. The executed result is that:

1)while I located BIOS data, BIOS code and Compiler Sections in IRAM in MEM tab in TCF file, TSK function can be executed;

2)while I located BIOS data, BIOS code and Compiler Sections in DDR in MEM tab in TCF file, TSK function cannot be executed;

I am working with OMAP-L138 using BIOS 5.41 in CCS3.3.

My codes are as follows:

In file 1:

void main()

{

     TSK_setpri(&TSK0,-1);                 //make TSK0 to suspended

}

void prd_func()

{

         ...............................    

        SWI_post(&SWI0);

}

In file 2:

void swi0_func()

{  

       ................

     TSK_setpri(&TSK0,4);               //set TSK0 priority to 4

     sem_post(&sem);

}

In file3:

void TSK0_func()

{

     for(;;)

    {

     TSK_ setpri(&TSK1,4);

         .......................

       TSK_yield();

    }

}

In file4:

void TSK1_func()

{

     for(;;)

    {

         .......................

    }

}

My codes are in several files, and I want my codes run in DDR. So I located BIOS data, BIOS code and Compiler Sections in DDR. But when I set MEM tab in this way, TSK cannot be exectued. How should I configure MEM tab? Can anyone give me your help!

Waiting for your reply urgently!

Best regards.

lex

 

  • BIOS code execution has no real idea about whether it in IRAM or DDR.  It's difficult to guess what could be wrong.   Can you clarify what you mean by "TSK cannot be executed?".  Can you use CCS to see if the program crash or if is it executing valid code.  Can you use the Kernel/Object View tool to see the state of the tasks and their stack usage?  Are you running your code on the TI EVM board or custom hardware.

    -Karl-

  • Hi,Karl

     I set a break in TSK0 to see whether the PC run into TSK0, and I also used LOG_printf to print something to clarify its execution. But when I set bios code, bios data and Compiler Section in DDR, the LOG_printf message cannot be print in message log. I am running my code on custom hardware. How to see if the program crash or if it is executing valid code using CCS.

    Thanks Karl!

    lex

  • In CCS, can you open the disassembly window and look to see where the PC is and make sure that the PC is in valid code?   Can you try running one of the provided examples in DDR?  

    -Karl-

  • I can make sure that the PC is running in PRD function and SWI function, because the data in PRD and SWI function can refresh in real-time.

    So I don't know why PC cannot run into TSK function?

    lex

  • Do you know if you have the cache enabled?   I bet the problem is that the PRD and SWI functions run at a high rate and take most of the CPU time and the TSK doesn't get a chance to run.  If the PRD and SWI functions take a lot of instructions and the code is in DDR with cache disabled, then the code will run very slow.

    [1]  Make sure that you have L2 cache enabled and check your MAR settings to make sure that the DDR the MAR bits for your external memory are set.  The MAR bits are used to enable the cache for external memory blocks.

    [2]  Remove some of your PRD or SWI code or stub it out so that it doesn't take much time.

    [3]  Make sure that you have your PLL set up correctly to run the CPU at the right frequency.

    -Karl-

  • Hi Karl,

    My PRD and SWI functions run very quilkly. PRD function runs in 100us,and SWI function runs in 20ms. TSK function cannot be executed while I set the period of PRD function to 200us.

     And I set DSP frequency at 300MHz and DDR frequency at 150MHz.

    When I  move my code to L2 RAM, PC can run into TSK.

    How to solve the problem?

    Best wishes

    lex

  • Hi Xiaoxia --

    Do you have the L2 cache enabled?   If you are running code and data from DDR, you should make sure you have some of L2 cache enabled.   External fetches of code and data are pretty slow so you want to use the cache.    Can you try changing the frequency or your PRD?   If you make it less frequent, you should get to your TSK.   I think the basic problem here is that TSK priority is lower than PRD/SWI priority, and you are running too much code at PRD/SWI level so the CPU never has a chance to execute the TSK.  All the time is spent at HWI and SWI processing.

    -Karl-

  • Hi Karl

    I am working on 0MAP-L138 platform in CCS5.41. In my DSP/BIOS tcf file, there are Cache_L1D and cache_L1P in MEM manager file, where is L2 cache? And how to enabled L2 cache? Whether put some datas or codes in L2 cache can enabled it?

    I changed the frequency of PRD, TSK can run.

    How to solve the problem of TSK cannot run in DDR about PRD in same frequency.

    Best wishes!

  • You can enable the L2 cache using the GBL module in the BIOS configuration.

    Note that L2 memory can be used as RAM or CACHE, but not both.    Regarding your PRD vs TSK problem,  you have to make sure that your PRD does not take more time than it's period.  If it runs every 100us and takes >100us to execute, then you have a big problem.   Only solution is to get a faster device, or minimize the period and/or amount of work you do within the PRD function.

    -Karl-

     

     

  • Hi Karl

    Thanks for your reply. My PRD function runs every 100us and it takes 56us to execute. So my PRD function does not take more time than its period.

    If I enabled L2 cache, whether I put all code and data in it. And what is the size of L2CFG? What is the MAR 0-255 bitmask?

    Thanks

    lex