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AM67: PCIE clock signal amplitude

Xingyu Zhu
Expert 4335 points

Part Number: AM67

Tool/software:

Hi expert,

Our customer use PCIE0_CLK_N/P to provide CLK to M2. They found the waveform amplitude is about 200mV. We would like know if we can modify this amplitude?

And do they need the PU 50R resistance? Thanks

Best Regards,

Xingyu Zhu

  • 0
    TI__Guru 64200 points

    Xingyu,

    Removing the 50ohm resistor should increase the amplitude as the scope input would already be 50ohm. Similarly, connecting the ref clk to the EP should also have a 50ohm term.

  • 0 in reply to ShreyasRao
    TI__Expert 4335 points

    Hi Shreyas,

    Thanks for your reply. Our customer has tried to remove 50ohm and find it can truly increase the amplitude.

    ShreyasRao said:
    Similarly, connecting the ref clk to the EP should also have a 50ohm term.

    Can you please elaborate this? As we understand, SoC is RC and M.2(wifi) is EP, right? And SoC provide the ref clk to EP. So should we use the 50R PU on the EP side? Thanks 

  • 0 in reply to Xingyu Zhu
    TI__Guru 64200 points

    Based on your scopeshot, the swing is 400mV and not 200mV as you mentioned.

    And based on internally discussing, the 50ohm external resistor to gnd is a requirement of the PCIe standard.

    would having the 50ohm resistor causing issues?